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intel/brw: Split to a function the code that calculate sampler channels that should be written
This block of code will be re-used in a future patch, also it reduces a bit the size and complexity of lower_sampler_logical_send(). No changes in behavior intended here. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38792>
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1 changed files with 25 additions and 15 deletions
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@ -735,6 +735,30 @@ get_sampler_msg_payload_type_bit_size(const intel_device_info *devinfo,
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return src_type_size * 8;
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return src_type_size * 8;
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}
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}
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/* Return one bit for each channel(ABGR), bit set means that channel should
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* not be written back.
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*/
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static uint32_t
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sampler_calc_channel_mask(const intel_device_info *devinfo, brw_tex_inst *tex)
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{
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/* If we're requesting fewer than four channels worth of response,
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* and we have an explicit header, we need to set up the sampler
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* writemask. It's reversed from normal: 1 means "don't write".
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*/
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unsigned comps_regs =
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DIV_ROUND_UP(regs_written(tex) - reg_unit(devinfo) * tex->residency,
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reg_unit(devinfo));
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unsigned comp_regs =
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DIV_ROUND_UP(tex->dst.component_size(tex->exec_size),
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reg_unit(devinfo) * REG_SIZE);
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if (comps_regs < 4 * comp_regs) {
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assert(comps_regs % comp_regs == 0);
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return ~((1 << (comps_regs / comp_regs)) - 1) & 0xf;
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}
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return 0;
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}
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static void
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static void
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lower_sampler_logical_send(const brw_builder &bld, brw_tex_inst *tex)
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lower_sampler_logical_send(const brw_builder &bld, brw_tex_inst *tex)
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{
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{
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@ -796,21 +820,7 @@ lower_sampler_logical_send(const brw_builder &bld, brw_tex_inst *tex)
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if (tex->residency)
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if (tex->residency)
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g0_2 |= 1 << 23; /* g0.2 bit23 : Pixel Null Mask Enable */
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g0_2 |= 1 << 23; /* g0.2 bit23 : Pixel Null Mask Enable */
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/* If we're requesting fewer than four channels worth of response,
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g0_2 |= sampler_calc_channel_mask(devinfo, tex) << 12;
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* and we have an explicit header, we need to set up the sampler
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* writemask. It's reversed from normal: 1 means "don't write".
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*/
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unsigned comps_regs =
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DIV_ROUND_UP(regs_written(tex) - reg_unit(devinfo) * tex->residency,
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reg_unit(devinfo));
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unsigned comp_regs =
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DIV_ROUND_UP(tex->dst.component_size(tex->exec_size),
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reg_unit(devinfo) * REG_SIZE);
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if (comps_regs < 4 * comp_regs) {
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assert(comps_regs % comp_regs == 0);
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unsigned mask = ~((1 << (comps_regs / comp_regs)) - 1) & 0xf;
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g0_2 |= mask << 12;
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}
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if (tex->has_const_offsets) {
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if (tex->has_const_offsets) {
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g0_2 |= ((tex->const_offsets[2] & 0xf) << 0) |
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g0_2 |= ((tex->const_offsets[2] & 0xf) << 0) |
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