radv: use one descriptor per plane for combined image+sampler with ycbcr

This removes a very old hack which will also allow us to enable DCC
for multiplanar formats eventually and to reduce the combined
image+sampler descriptor size from 96 to 48 on RDNA3+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35457>

src/amd/vulkan/nir/radv_nir_apply_pipeline_layout.c

@@ -231,9 +231,11 @@ get_sampler_desc(nir_builder *b, apply_layout_state *state, nir_deref_instr *der
    case AC_DESC_PLANE_0:
       break;
    case AC_DESC_FMASK:
-   case AC_DESC_PLANE_1:
       offset += 32;
       break;
+   case AC_DESC_PLANE_1:
+      offset += RADV_COMBINED_IMAGE_SAMPLER_DESC_SIZE;
+      break;
    case AC_DESC_SAMPLER:
       size = RADV_SAMPLER_DESC_SIZE / 4;
       if (binding->type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
@@ -243,8 +245,7 @@ get_sampler_desc(nir_builder *b, apply_layout_state *state, nir_deref_instr *der
       size = RADV_BUFFER_DESC_SIZE / 4;
       break;
    case AC_DESC_PLANE_2:
-      size = 4;
-      offset += 64;
+      offset += 2 * RADV_COMBINED_IMAGE_SAMPLER_DESC_SIZE;
       break;
    }
 
@@ -278,20 +279,7 @@ get_sampler_desc(nir_builder *b, apply_layout_state *state, nir_deref_instr *der
    nir_def *addr = convert_pointer_to_64_bit(b, state, load_desc_ptr(b, state, desc_set));
    nir_def *desc = nir_load_smem_amd(b, size, addr, index_offset, .align_mul = size * 4u);
 
-   /* 3 plane formats always have same size and format for plane 1 & 2, so
-    * use the tail from plane 1 so that we can store only the first 16 bytes
-    * of the last plane. */
-   if (desc_type == AC_DESC_PLANE_2) {
-      nir_def *desc2 = get_sampler_desc(b, state, deref, AC_DESC_PLANE_1, non_uniform, tex, write);
-
-      nir_def *comp[8];
-      for (unsigned i = 0; i < 4; i++)
-         comp[i] = nir_channel(b, desc, i);
-      for (unsigned i = 4; i < 8; i++)
-         comp[i] = nir_channel(b, desc2, i);
-
-      return nir_vec(b, comp, 8);
-   } else if (desc_type == AC_DESC_IMAGE && state->has_image_load_dcc_bug && !tex && !write) {
+   if (desc_type == AC_DESC_IMAGE && state->has_image_load_dcc_bug && !tex && !write) {
       nir_def *comp[8];
       for (unsigned i = 0; i < 8; i++)
          comp[i] = nir_channel(b, desc, i);

src/amd/vulkan/radv_descriptor_set.c

@@ -220,6 +220,7 @@ radv_CreateDescriptorSetLayout(VkDevice _device, const VkDescriptorSetLayoutCrea
          uint32_t alignment = radv_descriptor_alignment(binding->descriptorType);
          unsigned binding_buffer_count = radv_descriptor_type_buffer_count(binding->descriptorType);
          uint32_t descriptor_count = binding->descriptorCount;
+         uint32_t max_sampled_image_descriptors = 1;
          bool has_ycbcr_sampler = false;
 
          if (binding->descriptorType == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER && binding->pImmutableSamplers) {
@@ -229,6 +230,8 @@ radv_CreateDescriptorSetLayout(VkDevice _device, const VkDescriptorSetLayoutCrea
 
                if (conversion) {
                   has_ycbcr_sampler = true;
+                  max_sampled_image_descriptors =
+                     MAX2(max_sampled_image_descriptors, vk_format_get_plane_count(conversion->state.format));
                }
             }
          }
@@ -257,8 +260,7 @@ radv_CreateDescriptorSetLayout(VkDevice _device, const VkDescriptorSetLayoutCrea
             set_layout->binding[b].size = radv_get_sampled_image_desc_size(pdev);
             break;
          case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
-            /* main descriptor + fmask descriptor + sampler */
-            set_layout->binding[b].size = RADV_COMBINED_IMAGE_SAMPLER_DESC_SIZE;
+            set_layout->binding[b].size = max_sampled_image_descriptors * RADV_COMBINED_IMAGE_SAMPLER_DESC_SIZE;
             break;
          case VK_DESCRIPTOR_TYPE_SAMPLER:
             set_layout->binding[b].size = RADV_SAMPLER_DESC_SIZE;
@@ -1193,18 +1195,22 @@ write_image_descriptor_impl(struct radv_device *device, struct radv_cmd_buffer *
 static ALWAYS_INLINE void
 write_image_descriptor_ycbcr(unsigned *dst, const VkDescriptorImageInfo *image_info)
 {
-   const uint32_t size = RADV_COMBINED_IMAGE_SAMPLER_DESC_SIZE - RADV_SAMPLER_DESC_SIZE;
    struct radv_image_view *iview = NULL;
 
    if (image_info)
       iview = radv_image_view_from_handle(image_info->imageView);
 
    if (!iview) {
-      memset(dst, 0, size);
+      memset(dst, 0, 32);
       return;
    }
 
-   memcpy(dst, iview->descriptor.plane_descriptors[0], size);
+   const uint32_t plane_count = vk_format_get_plane_count(iview->vk.format);
+
+   for (uint32_t i = 0; i < plane_count; i++) {
+      memcpy(dst, iview->descriptor.plane_descriptors[i], 32);
+      dst += RADV_COMBINED_IMAGE_SAMPLER_DESC_SIZE / 4;
+   }
 }
 
 static ALWAYS_INLINE void

src/amd/vulkan/radv_formats.c

@@ -1234,7 +1234,7 @@ radv_GetPhysicalDeviceImageFormatProperties2(VkPhysicalDevice physicalDevice,
    }
 
    if (ycbcr_props) {
-      ycbcr_props->combinedImageSamplerDescriptorCount = 1;
+      ycbcr_props->combinedImageSamplerDescriptorCount = vk_format_get_plane_count(format);
    }
 
    if (texture_lod_props) {

src/amd/vulkan/radv_physical_device.c

@@ -1686,7 +1686,7 @@ radv_get_physical_device_properties(struct radv_physical_device *pdev)
       .nonStrictSinglePixelWideLinesUseParallelogram = true,
       .nonStrictWideLinesUseParallelogram = true,
       .blockTexelViewCompatibleMultipleLayers = true,
-      .maxCombinedImageSamplerDescriptorCount = 1,
+      .maxCombinedImageSamplerDescriptorCount = 3,
       .fragmentShadingRateClampCombinerInputs = true,
       .defaultRobustnessStorageBuffers = VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_ROBUST_BUFFER_ACCESS,
       .defaultRobustnessUniformBuffers = VK_PIPELINE_ROBUSTNESS_BUFFER_BEHAVIOR_ROBUST_BUFFER_ACCESS,