mirror of
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nak: Add encoding for a few instructions
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24998>
This commit is contained in:
Faith Ekstrand
Marge Bot
parent
83f8d6e2a7
commit
50b1deefa7
3 changed files with 313 additions and 5 deletions
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@ -5,6 +5,7 @@
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mod bitset;
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mod nak_assign_regs;
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mod nak_encode_tu102;
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mod nak_from_nir;
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mod nak_ir;
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mod nak_opt_copy_prop;
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@ -14,11 +15,26 @@ mod util;
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use nak_bindings::*;
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use nak_from_nir::*;
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use std::os::raw::c_void;
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#[repr(C)]
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struct ShaderBin {
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bin: nak_shader_bin,
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instrs: Vec<u32>,
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code: Vec<u32>,
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}
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impl ShaderBin {
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pub fn new(info: nak_shader_info, code: Vec<u32>) -> ShaderBin {
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let bin = nak_shader_bin {
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info: info,
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code_size: (code.len() * 4).try_into().unwrap(),
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code: code.as_ptr() as *const c_void,
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};
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ShaderBin {
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bin: bin,
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code: code,
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}
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}
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}
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#[no_mangle]
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@ -54,5 +70,26 @@ pub extern "C" fn nak_compile_shader(
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println!("NAK IR:\n{}", &s);
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std::ptr::null_mut()
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let info = nak_shader_info {
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num_gprs: 255,
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tls_size: 0,
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cs: nak_shader_info__bindgen_ty_1 {
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local_size: [0; 3],
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smem_size: 0,
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},
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hdr: [0; 32],
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};
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let code = nak_encode_tu102::encode_shader(&s);
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print!("Encoded shader:");
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for i in 0..code.len() {
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if (i % 8) == 0 {
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print!("\n ");
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}
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print!(" {:#x}", code[i]);
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}
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print!("\n\n");
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Box::into_raw(Box::new(ShaderBin::new(info, code))) as *mut nak_shader_bin
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}
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256
src/nouveau/compiler/nak_encode_tu102.rs
Normal file
256
src/nouveau/compiler/nak_encode_tu102.rs
Normal file
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@ -0,0 +1,256 @@
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/*
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* Copyright © 2022 Collabora, Ltd.
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* SPDX-License-Identifier: MIT
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*/
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use crate::bitset::*;
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use crate::nak_ir::*;
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use std::ops::Range;
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trait SrcMod {
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fn src_mod(&self, idx: usize) -> u8;
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}
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impl SrcMod for Instr {
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fn src_mod(&self, idx: usize) -> u8 {
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0 /* TODO */
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}
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}
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fn encode_imm(bs: &mut impl BitSetMut, range: Range<usize>, imm: &Immediate) {
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assert!(range.len() == 32);
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bs.set_field(range, imm.u);
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}
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fn encode_reg(bs: &mut impl BitSetMut, range: Range<usize>, reg: RegRef) {
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assert!(range.len() == 8);
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assert!(reg.file() == RegFile::GPR);
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bs.set_field(range, reg.base_idx());
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}
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fn encode_ureg(bs: &mut impl BitSetMut, range: Range<usize>, reg: RegRef) {
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assert!(range.len() == 8);
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assert!(reg.file() == RegFile::UGPR);
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assert!(reg.base_idx() <= 63);
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bs.set_field(range, reg.base_idx());
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}
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fn encode_mod(bs: &mut impl BitSetMut, range: Range<usize>, src_mod: u8) {
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assert!(range.len() == 2);
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bs.set_field(range, src_mod);
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}
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fn encode_cb(bs: &mut impl BitSetMut, range: Range<usize>, cb: &CBufRef) {
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let mut v = bs.subset_mut(range);
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v.set_field(0..16, cb.offset);
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if let CBuf::Binding(idx) = cb.buf {
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v.set_field(16..21, idx);
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} else {
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panic!("Must be a bound constant buffer");
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}
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}
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fn encode_cx(bs: &mut impl BitSetMut, range: Range<usize>, cb: &CBufRef) {
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let mut v = bs.subset_mut(range);
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if let CBuf::BindlessGPR(gpr) = cb.buf {
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encode_ureg(&mut v, 0..8, gpr);
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} else {
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panic!("Must be a bound constant buffer");
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}
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assert!(cb.offset % 4 == 0);
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v.set_field(8..22, cb.offset / 4);
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}
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fn encode_instr_base(bs: &mut impl BitSetMut, instr: &Instr, opcode: u16) {
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bs.set_field(0..12, opcode);
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bs.set_field(12..16, 0x7_u8); /* TODO: Predicate */
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if instr.num_dsts() > 0 {
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assert!(instr.num_dsts() == 1);
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encode_reg(bs, 16..24, *instr.dst(0).as_reg().unwrap());
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}
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bs.set_field(105..109, instr.deps.delay);
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bs.set_bit(109, instr.deps.yld);
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bs.set_field(110..113, instr.deps.wr_bar().unwrap_or(7));
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bs.set_field(113..116, instr.deps.rd_bar().unwrap_or(7));
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bs.set_field(116..122, instr.deps.wt_bar_mask);
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bs.set_field(122..126, instr.deps.reuse_mask);
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}
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enum ALUSrc {
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Imm(Immediate),
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Reg(RegRef),
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UReg(RegRef),
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CBuf(CBufRef),
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}
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impl ALUSrc {
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pub fn from_src(src: &Src, comps: u8) -> ALUSrc {
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match src {
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Src::Reg(reg) => {
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assert!(reg.comps() == comps);
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match reg.file() {
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RegFile::GPR => ALUSrc::Reg(*reg),
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RegFile::UGPR => ALUSrc::UReg(*reg),
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_ => panic!("Invalid ALU register file"),
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}
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}
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Src::Imm(i) => ALUSrc::Imm(*i),
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Src::CBuf(cb) => ALUSrc::CBuf(*cb),
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_ => panic!("Invalid ALU source"),
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}
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}
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}
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fn encode_alu(bs: &mut impl BitSetMut, instr: &Instr, opcode: u16) {
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encode_instr_base(bs, instr, opcode);
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encode_reg(bs, 24..32, *instr.src(0).as_reg().unwrap());
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bs.set_field(32..72, 0u64); /* Pad */
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let mut form = 0_u8;
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if instr.num_srcs() > 1 {
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match ALUSrc::from_src(instr.src(1), 1) {
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ALUSrc::Reg(reg1) => {
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if instr.num_srcs() == 2 {
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form = 1;
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encode_reg(bs, 32..40, reg1);
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encode_mod(bs, 62..64, instr.src_mod(1));
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} else {
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assert!(instr.num_srcs() == 3);
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match ALUSrc::from_src(instr.src(2), 1) {
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ALUSrc::Reg(reg2) => {
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form = 1;
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encode_reg(bs, 32..40, reg1);
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encode_mod(bs, 62..64, instr.src_mod(1));
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encode_reg(bs, 64..72, reg2);
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encode_mod(bs, 74..76, instr.src_mod(2));
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}
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ALUSrc::UReg(reg2) => {
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form = 7;
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encode_ureg(bs, 32..40, reg2);
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encode_mod(bs, 62..64, instr.src_mod(2));
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encode_reg(bs, 64..72, reg1);
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encode_mod(bs, 74..76, instr.src_mod(1));
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}
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ALUSrc::Imm(imm) => {
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form = 2;
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encode_imm(bs, 32..64, &imm);
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encode_reg(bs, 64..72, reg1);
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encode_mod(bs, 74..76, instr.src_mod(1));
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}
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ALUSrc::CBuf(cb) => {
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form = 3;
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/* TODO encode_cx */
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encode_cb(bs, 38..59, &cb);
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encode_mod(bs, 62..64, instr.src_mod(2));
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encode_reg(bs, 64..72, reg1);
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encode_mod(bs, 74..76, instr.src_mod(1));
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}
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_ => panic!("Invalid instruction form"),
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}
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}
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}
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ALUSrc::Reg(reg1) => {
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form = 6;
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encode_ureg(bs, 32..40, reg1);
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encode_mod(bs, 62..64, instr.src_mod(1));
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if instr.num_srcs() > 2 {
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assert!(instr.num_srcs() == 3);
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encode_reg(bs, 64..72, *instr.src(2).as_reg().unwrap());
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encode_mod(bs, 74..76, instr.src_mod(2));
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}
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}
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ALUSrc::Imm(imm) => {
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form = 4;
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encode_imm(bs, 32..64, &imm);
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if instr.num_srcs() > 2 {
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encode_reg(bs, 64..72, *instr.src(2).as_reg().unwrap());
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encode_mod(bs, 74..76, instr.src_mod(2));
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}
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}
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ALUSrc::CBuf(cb) => {
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form = 5;
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/* TODO encode_cx */
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encode_cb(bs, 38..59, &cb);
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encode_mod(bs, 62..64, instr.src_mod(1));
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if instr.num_srcs() > 2 {
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encode_reg(bs, 64..72, *instr.src(2).as_reg().unwrap());
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encode_mod(bs, 74..76, instr.src_mod(2));
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}
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}
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_ => panic!("Invalid instruction form"),
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}
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}
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bs.set_field(9..12, form);
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}
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fn encode_mov(bs: &mut impl BitSetMut, instr: &Instr) {
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encode_alu(bs, instr, 0x002);
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bs.set_field(72..76, 0xf_u32 /* TODO: Quad lanes */);
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}
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fn encode_ald(bs: &mut impl BitSetMut, instr: &Instr, attr: &AttrAccess) {
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encode_instr_base(bs, &instr, 0x321);
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encode_reg(bs, 24..32, *instr.src(0).as_reg().unwrap());
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encode_reg(bs, 32..40, *instr.src(1).as_reg().unwrap());
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bs.set_field(40..50, attr.addr);
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bs.set_field(74..76, attr.comps - 1);
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bs.set_field(76..77, attr.patch);
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bs.set_field(77..78, attr.flags);
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bs.set_field(79..80, attr.out_load);
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}
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fn encode_ast(bs: &mut impl BitSetMut, instr: &Instr, attr: &AttrAccess) {
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encode_instr_base(bs, &instr, 0x322);
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assert!(instr.num_dsts() == 0);
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encode_reg(bs, 32..40, *instr.src(0).as_reg().unwrap());
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encode_reg(bs, 24..32, *instr.src(1).as_reg().unwrap());
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encode_reg(bs, 64..72, *instr.src(2).as_reg().unwrap());
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bs.set_field(40..50, attr.addr);
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bs.set_field(74..76, attr.comps - 1);
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bs.set_field(76..77, attr.patch);
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bs.set_field(77..78, attr.flags);
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assert!(!attr.out_load);
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}
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fn encode_exit(bs: &mut impl BitSetMut, instr: &Instr) {
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encode_instr_base(bs, instr, 0x94d);
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bs.set_field(84..85, false); /* ./.KEEPREFCOUNT/.PREEMPTED/.INVALID3 */
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bs.set_field(85..86, false); /* .NO_ATEXIT */
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bs.set_field(87..90, 0x7_u8); /* TODO: Predicate */
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bs.set_field(90..91, false); /* NOT */
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}
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pub fn encode_instr(instr: &Instr) -> [u32; 4] {
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let mut enc = [0_u32; 4];
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let mut bs = BitSetMutView::new(&mut enc);
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match &instr.op {
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Opcode::MOV => encode_mov(&mut bs, instr),
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Opcode::ALD(a) => encode_ald(&mut bs, instr, &a),
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Opcode::AST(a) => encode_ast(&mut bs, instr, &a),
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Opcode::EXIT => encode_exit(&mut bs, instr),
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_ => panic!("Unhandled instruction"),
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}
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enc
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}
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pub fn encode_shader(shader: &Shader) -> Vec<u32> {
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let mut encoded = Vec::new();
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assert!(shader.functions.len() == 1);
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let func = &shader.functions[0];
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for b in &func.blocks {
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for instr in &b.instrs {
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let e = encode_instr(&instr);
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encoded.extend_from_slice(&e[..]);
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}
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}
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encoded
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}
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@ -534,7 +534,13 @@ impl Instr {
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out_load: false,
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flags: 0,
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};
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Instr::new(Opcode::ALD(attr), slice::from_ref(&dst), &[vtx, offset])
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let mut instr = Instr::new(
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Opcode::ALD(attr),
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slice::from_ref(&dst),
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&[vtx, offset],
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);
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instr.deps.set_wr_bar(0);
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instr
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}
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pub fn new_ast(attr_addr: u16, data: Src, vtx: Src, offset: Src) -> Instr {
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@ -545,7 +551,12 @@ impl Instr {
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out_load: false,
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flags: 0,
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};
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Instr::new(Opcode::AST(attr), &[], &[data, vtx, offset])
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let mut instr =
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Instr::new(Opcode::AST(attr), &[], &[data, vtx, offset]);
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instr.deps.set_delay(2);
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instr.deps.set_rd_bar(0);
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instr.deps.add_wt_bar(0);
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instr
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}
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pub fn new_fs_out(srcs: &[Src]) -> Instr {
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@ -553,7 +564,11 @@ impl Instr {
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}
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pub fn new_exit() -> Instr {
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Instr::new(Opcode::EXIT, &[], &[])
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let mut instr = Instr::new(Opcode::EXIT, &[], &[]);
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for i in 0..6 {
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instr.deps.add_wt_bar(i);
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}
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instr
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}
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pub fn dst(&self, idx: usize) -> &Dst {
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