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gallium: remove pipe_buffer from surfaces

Browse source 
this change disassociates, at least from the driver perspective,
the surface from buffer. surfaces are technically now views on the
textures so make it so by hiding the buffer in the internals of
textures.
This commit is contained in:
Zack Rusin 2009-02-02 23:47:16 -05:00
parent df73c964d8
commit 5069bfed29
40 changed files with 177 additions and 125 deletions
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36
src/gallium/auxiliary/util/u_gen_mipmap.c
View file

@ -1125,19 +1125,19 @@ make_1d_mipmap(struct gen_mipmap_state *ctx,
dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice,
PIPE_BUFFER_USAGE_CPU_WRITE);
srcMap = ((ubyte *) pipe_buffer_map(screen, srcSurf->buffer,
PIPE_BUFFER_USAGE_CPU_READ)
srcMap = ((ubyte *) pipe_surface_map(srcSurf,
PIPE_BUFFER_USAGE_CPU_READ)
+ srcSurf->offset);
dstMap = ((ubyte *) pipe_buffer_map(screen, dstSurf->buffer,
PIPE_BUFFER_USAGE_CPU_WRITE)
dstMap = ((ubyte *) pipe_surface_map(dstSurf,
PIPE_BUFFER_USAGE_CPU_WRITE)
+ dstSurf->offset);
reduce_1d(pt->format,
srcSurf->width, srcMap,
dstSurf->width, dstMap);
pipe_buffer_unmap(screen, srcSurf->buffer);
pipe_buffer_unmap(screen, dstSurf->buffer);
pipe_surface_unmap(srcSurf);
pipe_surface_unmap(dstSurf);
pipe_surface_reference(&srcSurf, NULL);
pipe_surface_reference(&dstSurf, NULL);
@ -1168,11 +1168,11 @@ make_2d_mipmap(struct gen_mipmap_state *ctx,
dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice,
PIPE_BUFFER_USAGE_CPU_WRITE);
srcMap = ((ubyte *) pipe_buffer_map(screen, srcSurf->buffer,
PIPE_BUFFER_USAGE_CPU_READ)
srcMap = ((ubyte *) pipe_surface_map(srcSurf,
PIPE_BUFFER_USAGE_CPU_READ)
+ srcSurf->offset);
dstMap = ((ubyte *) pipe_buffer_map(screen, dstSurf->buffer,
PIPE_BUFFER_USAGE_CPU_WRITE)
dstMap = ((ubyte *) pipe_surface_map(dstSurf,
PIPE_BUFFER_USAGE_CPU_WRITE)
+ dstSurf->offset);
reduce_2d(pt->format,
@ -1181,8 +1181,8 @@ make_2d_mipmap(struct gen_mipmap_state *ctx,
dstSurf->width, dstSurf->height,
dstSurf->stride, dstMap);
pipe_buffer_unmap(screen, srcSurf->buffer);
pipe_buffer_unmap(screen, dstSurf->buffer);
pipe_surface_unmap(srcSurf);
pipe_surface_unmap(dstSurf);
pipe_surface_reference(&srcSurf, NULL);
pipe_surface_reference(&dstSurf, NULL);
@ -1212,11 +1212,11 @@ make_3d_mipmap(struct gen_mipmap_state *ctx,
dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice,
PIPE_BUFFER_USAGE_CPU_WRITE);
srcMap = ((ubyte *) pipe_buffer_map(screen, srcSurf->buffer,
PIPE_BUFFER_USAGE_CPU_READ)
srcMap = ((ubyte *) pipe_surface_map(srcSurf,
PIPE_BUFFER_USAGE_CPU_READ)
+ srcSurf->offset);
dstMap = ((ubyte *) pipe_buffer_map(screen, dstSurf->buffer,
PIPE_BUFFER_USAGE_CPU_WRITE)
dstMap = ((ubyte *) pipe_surface_map(dstSurf,
PIPE_BUFFER_USAGE_CPU_WRITE)
+ dstSurf->offset);
#if 0
@ -1229,8 +1229,8 @@ make_3d_mipmap(struct gen_mipmap_state *ctx,
(void) reduce_3d;
#endif
pipe_buffer_unmap(screen, srcSurf->buffer);
pipe_buffer_unmap(screen, dstSurf->buffer);
pipe_surface_unmap(srcSurf);
pipe_surface_unmap(dstSurf);
pipe_surface_reference(&srcSurf, NULL);
pipe_surface_reference(&dstSurf, NULL);

6
src/gallium/drivers/i915simple/i915_screen.c
View file

@ -209,7 +209,8 @@ i915_surface_map( struct pipe_screen *screen,
struct pipe_surface *surface,
unsigned flags )
{
char *map = pipe_buffer_map( screen, surface->buffer, flags );
struct i915_texture *tex = (struct i915_texture *)surface->texture;
char *map = pipe_buffer_map( screen, tex->buffer, flags );
if (map == NULL)
return NULL;
@ -228,7 +229,8 @@ static void
i915_surface_unmap(struct pipe_screen *screen,
struct pipe_surface *surface)
{
pipe_buffer_unmap( screen, surface->buffer );
struct i915_texture *tex = (struct i915_texture *)surface->texture;
pipe_buffer_unmap( screen, tex->buffer );
}

22
src/gallium/drivers/i915simple/i915_state_emit.c
View file

@ -213,18 +213,22 @@ i915_emit_hardware_state(struct i915_context *i915 )
if (cbuf_surface) {
unsigned cpitch = cbuf_surface->stride;
unsigned ctile = BUF_3D_USE_FENCE;
if (cbuf_surface->texture &&
((struct i915_texture*)(cbuf_surface->texture))->tiled) {
struct i915_texture *tex = (struct i915_texture *)
cbuf_surface->texture;
struct pipe_buffer *buffer = tex->buffer;
assert(tex);
if (tex && tex->tiled) {
ctile = BUF_3D_TILED_SURFACE;
}
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
OUT_BATCH(BUF_3D_ID_COLOR_BACK |
OUT_BATCH(BUF_3D_ID_COLOR_BACK |
BUF_3D_PITCH(cpitch) | /* pitch in bytes */
ctile);
OUT_RELOC(cbuf_surface->buffer,
OUT_RELOC(tex->buffer,
I915_BUFFER_ACCESS_WRITE,
cbuf_surface->offset);
}
@ -234,8 +238,12 @@ i915_emit_hardware_state(struct i915_context *i915 )
if (depth_surface) {
unsigned zpitch = depth_surface->stride;
unsigned ztile = BUF_3D_USE_FENCE;
if (depth_surface->texture &&
((struct i915_texture*)(depth_surface->texture))->tiled) {
struct i915_texture *tex = (struct i915_texture *)
depth_surface->texture;
struct pipe_buffer *buffer = tex->buffer;
assert(tex);
if (tex && tex->tiled) {
ztile = BUF_3D_TILED_SURFACE;
}
@ -245,7 +253,7 @@ i915_emit_hardware_state(struct i915_context *i915 )
BUF_3D_PITCH(zpitch) | /* pitch in bytes */
ztile);
OUT_RELOC(depth_surface->buffer,
OUT_RELOC(tex->buffer,
I915_BUFFER_ACCESS_WRITE,
depth_surface->offset);
}

9
src/gallium/drivers/i915simple/i915_surface.c
View file

@ -74,13 +74,15 @@ i915_surface_copy(struct pipe_context *pipe,
pipe->screen->surface_unmap(pipe->screen, dst);
}
else {
struct i915_texture *dst_tex = (struct i915_texture *)dst->texture;
struct i915_texture *src_tex = (struct i915_texture *)src->texture;
assert(dst->block.width == 1);
assert(dst->block.height == 1);
i915_copy_blit( i915_context(pipe),
do_flip,
dst->block.size,
(unsigned short) src->stride, src->buffer, src->offset,
(unsigned short) dst->stride, dst->buffer, dst->offset,
(unsigned short) src->stride, src_tex->buffer, src->offset,
(unsigned short) dst->stride, dst_tex->buffer, dst->offset,
(short) srcx, (short) srcy, (short) dstx, (short) dsty, (short) width, (short) height );
}
}
@ -102,12 +104,13 @@ i915_surface_fill(struct pipe_context *pipe,
pipe->screen->surface_unmap(pipe->screen, dst);
}
else {
struct i915_texture *tex = (struct i915_texture *)dst->texture;
assert(dst->block.width == 1);
assert(dst->block.height == 1);
i915_fill_blit( i915_context(pipe),
dst->block.size,
(unsigned short) dst->stride,
dst->buffer, dst->offset,
tex->buffer, dst->offset,
(short) dstx, (short) dsty,
(short) width, (short) height,
value );

2
src/gallium/drivers/i915simple/i915_texture.c
View file

@ -683,7 +683,6 @@ i915_get_tex_surface(struct pipe_screen *screen,
if (ps) {
ps->refcount = 1;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(screen, &ps->buffer, tex->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];
@ -755,7 +754,6 @@ i915_tex_surface_release(struct pipe_screen *screen,
}
pipe_texture_reference(&surf->texture, NULL);
pipe_buffer_reference(screen, &surf->buffer, NULL);
FREE(surf);
}

4
src/gallium/drivers/i965simple/brw_misc_state.c
View file

@ -223,7 +223,7 @@ static void upload_depthbuffer(struct brw_context *brw)
OUT_BATCH(0);
} else {
unsigned int format;
struct brw_texture *tex = (struct brw_texture *)depth_surface->texture;
assert(depth_surface->block.width == 1);
assert(depth_surface->block.height == 1);
switch (depth_surface->block.size) {
@ -246,7 +246,7 @@ static void upload_depthbuffer(struct brw_context *brw)
(BRW_TILEWALK_YMAJOR << 26) |
// (depth_surface->region->tiled << 27) |
(BRW_SURFACE_2D << 29));
OUT_RELOC(depth_surface->buffer,
OUT_RELOC(tex->buffer,
PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE, 0);
OUT_BATCH((BRW_SURFACE_MIPMAPLAYOUT_BELOW << 1) |
((depth_surface->stride/depth_surface->block.size - 1) << 6) |

9
src/gallium/drivers/i965simple/brw_surface.c
View file

@ -74,13 +74,15 @@ brw_surface_copy(struct pipe_context *pipe,
pipe->screen->surface_unmap(pipe->screen, dst);
}
else {
struct brw_texture *dst_tex = (struct brw_texture *)dst->texture;
struct brw_texture *src_tex = (struct brw_texture *)src->texture;
assert(dst->block.width == 1);
assert(dst->block.height == 1);
brw_copy_blit(brw_context(pipe),
do_flip,
dst->block.size,
(short) src->stride/src->block.size, src->buffer, src->offset, FALSE,
(short) dst->stride/dst->block.size, dst->buffer, dst->offset, FALSE,
(short) src->stride/src->block.size, src_tex->buffer, src->offset, FALSE,
(short) dst->stride/dst->block.size, dst_tex->buffer, dst->offset, FALSE,
(short) srcx, (short) srcy, (short) dstx, (short) dsty,
(short) width, (short) height, PIPE_LOGICOP_COPY);
}
@ -103,12 +105,13 @@ brw_surface_fill(struct pipe_context *pipe,
pipe->screen->surface_unmap(pipe->screen, dst);
}
else {
struct brw_texture *tex = (struct brw_texture *)dst->texture;
assert(dst->block.width == 1);
assert(dst->block.height == 1);
brw_fill_blit(brw_context(pipe),
dst->block.size,
(short) dst->stride/dst->block.size,
dst->buffer, dst->offset, FALSE,
tex->buffer, dst->offset, FALSE,
(short) dstx, (short) dsty,
(short) width, (short) height,
value);

1
src/gallium/drivers/i965simple/brw_tex_layout.c
View file

@ -367,7 +367,6 @@ brw_get_tex_surface_screen(struct pipe_screen *screen,
if (ps) {
ps->refcount = 1;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(screen, &ps->buffer, tex->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];

3
src/gallium/drivers/i965simple/brw_wm_surface_state.c
View file

@ -193,6 +193,7 @@ static void upload_wm_surfaces(struct brw_context *brw )
/* BRW_NEW_FRAMEBUFFER
*/
struct pipe_surface *pipe_surface = brw->attribs.FrameBuffer.cbufs[0];/*fixme*/
struct brw_texture *tex = (struct brw_texture *)pipe_surface->texture;
memset(&surf, 0, sizeof(surf));
@ -204,7 +205,7 @@ static void upload_wm_surfaces(struct brw_context *brw )
surf.ss0.surface_type = BRW_SURFACE_2D;
surf.ss1.base_addr = brw_buffer_offset( brw, pipe_surface->buffer );
surf.ss1.base_addr = brw_buffer_offset( brw, tex->buffer );
surf.ss2.width = pipe_surface->width - 1;
surf.ss2.height = pipe_surface->height - 1;

2
src/gallium/drivers/nv04/nv04_miptree.c
View file

@ -107,7 +107,6 @@ nv04_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
if (!ps)
return NULL;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(pscreen, &ps->buffer, nv04mt->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];
@ -138,7 +137,6 @@ nv04_miptree_surface_del(struct pipe_screen *pscreen,
return;
pipe_texture_reference(&ps->texture, NULL);
pipe_buffer_reference(pscreen->winsys, &ps->buffer, NULL);
FREE(ps);
}

9
src/gallium/drivers/nv04/nv04_screen.c
View file

@ -1,4 +1,5 @@
#include "pipe/p_screen.h"
#include "pipe/p_inlines.h"
#include "util/u_simple_screen.h"
#include "nv04_context.h"
@ -122,10 +123,10 @@ static void *
nv04_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
unsigned flags )
{
struct pipe_winsys *ws = screen->winsys;
void *map;
struct nv04_miptree *nv04mt = (struct nv04_miptree *)surface->texture;
map = ws->buffer_map(ws, surface->buffer, flags);
map = pipe_buffer_map(screen, nv04mt->buffer, flags);
if (!map)
return NULL;
@ -135,9 +136,9 @@ nv04_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
static void
nv04_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
{
struct pipe_winsys *ws = screen->winsys;
struct nv04_miptree *nv04mt = (struct nv04_miptree *)surface->texture;
ws->buffer_unmap(ws, surface->buffer);
pipe_buffer_unmap(screen, nv04mt->buffer);
}
static void

9
src/gallium/drivers/nv04/nv04_state_emit.c
View file

@ -96,6 +96,7 @@ static void nv04_state_emit_framebuffer(struct nv04_context* nv04)
struct pipe_surface *rt, *zeta;
uint32_t rt_format, w, h;
int colour_format = 0, zeta_format = 0;
struct nv04_miptree *nv04mt = 0;
w = fb->cbufs[0]->width;
h = fb->cbufs[0]->height;
@ -129,14 +130,16 @@ static void nv04_state_emit_framebuffer(struct nv04_context* nv04)
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_FORMAT, 1);
OUT_RING(rt_format);
nv04mt = (struct nv04_miptree *)rt->texture;
/* FIXME pitches have to be aligned ! */
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_PITCH, 2);
OUT_RING(rt->stride|(zeta->stride<<16));
OUT_RELOCl(rt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
if (fb->zsbuf) {
nv04mt = (struct nv04_miptree *)zeta->texture;
BEGIN_RING(context_surfaces_3d, NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA, 1);
OUT_RELOCl(zeta->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
OUT_RELOCl(nv04mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
}
}

1
src/gallium/drivers/nv10/nv10_miptree.c
View file

@ -114,7 +114,6 @@ nv10_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt,
if (!ps)
return NULL;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(screen, &ps->buffer, nv10mt->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];

6
src/gallium/drivers/nv10/nv10_screen.c
View file

@ -122,8 +122,9 @@ nv10_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
{
struct pipe_winsys *ws = screen->winsys;
void *map;
struct nv10_miptree *nv10mt = (struct nv10_miptree *)surface->texture;
map = ws->buffer_map(ws, surface->buffer, flags);
map = ws->buffer_map(ws, nv10mt->buffer, flags);
if (!map)
return NULL;
@ -134,8 +135,9 @@ static void
nv10_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
{
struct pipe_winsys *ws = screen->winsys;
struct nv10_miptree *nv10mt = (struct nv10_miptree *)surface->texture;
ws->buffer_unmap(ws, surface->buffer);
ws->buffer_unmap(ws, nv10mt->buffer);
}
static void

7
src/gallium/drivers/nv10/nv10_state_emit.c
View file

@ -106,6 +106,7 @@ static void nv10_state_emit_framebuffer(struct nv10_context* nv10)
struct pipe_surface *rt, *zeta = NULL;
uint32_t rt_format, w, h;
int colour_format = 0, zeta_format = 0;
struct nv10_miptree *nv10mt = 0;
w = fb->cbufs[0]->width;
h = fb->cbufs[0]->height;
@ -147,11 +148,13 @@ static void nv10_state_emit_framebuffer(struct nv10_context* nv10)
OUT_RING (rt->stride | (rt->stride << 16));
}
nv10->rt[0] = rt->buffer;
nv10mt = (struct nv10_miptree *)rt->texture;
nv10->rt[0] = nv10mt->buffer;
if (zeta_format)
{
nv10->zeta = zeta->buffer;
nv10mt = (struct nv10_miptree *)zeta->texture;
nv10->zeta = nv10mt->buffer;
}
BEGIN_RING(celsius, NV10TCL_RT_HORIZ, 3);

2
src/gallium/drivers/nv20/nv20_miptree.c
View file

@ -106,7 +106,6 @@ nv20_miptree_surface_get(struct pipe_screen *screen, struct pipe_texture *pt,
if (!ps)
return NULL;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(screen, &ps->buffer, nv20mt->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];
@ -141,7 +140,6 @@ nv20_miptree_surface_release(struct pipe_screen *pscreen,
return;
pipe_texture_reference(&ps->texture, NULL);
pipe_buffer_reference(pscreen, &ps->buffer, NULL);
FREE(ps);
}

6
src/gallium/drivers/nv20/nv20_screen.c
View file

@ -122,8 +122,9 @@ nv20_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
{
struct pipe_winsys *ws = screen->winsys;
void *map;
struct nv20_miptree *nv20mt = (struct nv20_miptree *)surface->texture;
map = ws->buffer_map(ws, surface->buffer, flags);
map = ws->buffer_map(ws, nv20mt->buffer, flags);
if (!map)
return NULL;
@ -134,8 +135,9 @@ static void
nv20_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
{
struct pipe_winsys *ws = screen->winsys;
struct nv20_miptree *nv20mt = (struct nv20_miptree *)surface->texture;
ws->buffer_unmap(ws, surface->buffer);
ws->buffer_unmap(ws, nv20mt->buffer);
}
static void

7
src/gallium/drivers/nv20/nv20_state_emit.c
View file

@ -112,6 +112,7 @@ static void nv20_state_emit_framebuffer(struct nv20_context* nv20)
struct pipe_surface *rt, *zeta = NULL;
uint32_t rt_format, w, h;
int colour_format = 0, zeta_format = 0;
struct nv20_miptree *nv20mt = 0;
w = fb->cbufs[0]->width;
h = fb->cbufs[0]->height;
@ -153,11 +154,13 @@ static void nv20_state_emit_framebuffer(struct nv20_context* nv20)
OUT_RING (rt->stride | (rt->stride << 16));
}
nv20->rt[0] = rt->buffer;
nv20mt = (struct nv20_miptree *)rt->texture;
nv20->rt[0] = nv20mt->buffer;
if (zeta_format)
{
nv20->zeta = zeta->buffer;
nv20mt = (struct nv20_miptree *)zeta->texture;
nv20->zeta = nv20mt->buffer;
}
BEGIN_RING(kelvin, NV20TCL_RT_HORIZ, 3);

2
src/gallium/drivers/nv30/nv30_miptree.c
View file

@ -143,7 +143,6 @@ nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
if (!ps)
return NULL;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(pscreen, &ps->buffer, nv30mt->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];
@ -181,7 +180,6 @@ nv30_miptree_surface_del(struct pipe_screen *pscreen,
return;
pipe_texture_reference(&ps->texture, NULL);
pipe_buffer_reference(pscreen, &ps->buffer, NULL);
FREE(ps);
}

6
src/gallium/drivers/nv30/nv30_screen.c
View file

@ -134,6 +134,7 @@ nv30_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
struct pipe_winsys *ws = screen->winsys;
struct pipe_surface *surface_to_map;
void *map;
struct nv30_miptree *nv30mt = (struct nv30_miptree *)surface->texture;
if (!(surface->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) {
struct nv30_miptree *mt = (struct nv30_miptree *)surface->texture;
@ -162,7 +163,7 @@ nv30_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
assert(surface_to_map);
map = ws->buffer_map(ws, surface_to_map->buffer, flags);
map = ws->buffer_map(ws, nv30mt->buffer, flags);
if (!map)
return NULL;
@ -174,6 +175,7 @@ nv30_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
{
struct pipe_winsys *ws = screen->winsys;
struct pipe_surface *surface_to_unmap;
struct nv30_miptree *nv30mt = (struct nv30_miptree *)surface->texture;
/* TODO: Copy from shadow just before push buffer is flushed instead.
There are probably some programs that map/unmap excessively
@ -190,7 +192,7 @@ nv30_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
assert(surface_to_unmap);
ws->buffer_unmap(ws, surface_to_unmap->buffer);
ws->buffer_unmap(ws, nv30mt->buffer);
if (surface_to_unmap != surface) {
struct nv30_screen *nvscreen = nv30_screen(screen);

16
src/gallium/drivers/nv30/nv30_state_fb.c
View file

@ -12,6 +12,7 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM;
unsigned w = fb->width;
unsigned h = fb->height;
struct nv30_miptree *nv30mt;
rt_enable = 0;
for (i = 0; i < fb->nr_cbufs; i++) {
@ -77,34 +78,37 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
pitch |= (pitch << 16);
}
nv30mt = (struct nv30_miptree *)rt[0]->texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR0, 1);
so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_COLOR0_PITCH, 2);
so_data (so, pitch);
so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags |
so_reloc (so, nv30mt->buffer, rt[0]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
}
if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) {
nv30mt = (struct nv30_miptree *)rt[1]->texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR1, 1);
so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_COLOR1_OFFSET, 2);
so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags |
so_reloc (so, nv30mt->buffer, rt[1]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_data (so, rt[1]->stride);
}
if (zeta_format) {
nv30mt = (struct nv30_miptree *)zeta->texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_ZETA, 1);
so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_ZETA_OFFSET, 1);
so_reloc (so, zeta->buffer, zeta->offset, rt_flags |
so_reloc (so, nv30mt->buffer, zeta->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
/* TODO: allocate LMA depth buffer */
}

2
src/gallium/drivers/nv40/nv40_miptree.c
View file

@ -144,7 +144,6 @@ nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
if (!ps)
return NULL;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(pscreen, &ps->buffer, mt->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];
@ -182,7 +181,6 @@ nv40_miptree_surface_del(struct pipe_screen *pscreen,
return;
pipe_texture_reference(&ps->texture, NULL);
pipe_buffer_reference(pscreen, &ps->buffer, NULL);
FREE(ps);
}

9
src/gallium/drivers/nv40/nv40_screen.c
View file

@ -143,6 +143,7 @@ nv40_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
struct pipe_winsys *ws = screen->winsys;
struct pipe_surface *surface_to_map;
void *map;
struct nv40_miptree *mt;
if (!(surface->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) {
struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture;
@ -170,8 +171,8 @@ nv40_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
surface_to_map = surface;
assert(surface_to_map);
map = ws->buffer_map(ws, surface_to_map->buffer, flags);
mt = (struct nv40_miptree *)surface_to_map->texture;
map = ws->buffer_map(ws, mt->buffer, flags);
if (!map)
return NULL;
@ -183,6 +184,7 @@ nv40_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
{
struct pipe_winsys *ws = screen->winsys;
struct pipe_surface *surface_to_unmap;
struct nv40_miptree *mt;
/* TODO: Copy from shadow just before push buffer is flushed instead.
There are probably some programs that map/unmap excessively
@ -199,7 +201,8 @@ nv40_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
assert(surface_to_unmap);
ws->buffer_unmap(ws, surface_to_unmap->buffer);
mt = (struct nv40_miptree *)surface_to_unmap->texture;
ws->buffer_unmap(ws, mt->buffer);
if (surface_to_unmap != surface) {
struct nv40_screen *nvscreen = nv40_screen(screen);

27
src/gallium/drivers/nv40/nv40_state_fb.c
View file

@ -1,6 +1,13 @@
#include "nv40_context.h"
#include "nouveau/nouveau_util.h"
static struct pipe_buffer *
nv40_surface_buffer(struct pipe_surface *surface)
{
struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture;
return mt->buffer;
}
static boolean
nv40_state_framebuffer_validate(struct nv40_context *nv40)
{
@ -71,33 +78,33 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40)
if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) {
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR0, 1);
so_reloc (so, rt[0]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv40_surface_buffer(rt[0]), 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->screen->curie, NV40TCL_COLOR0_PITCH, 2);
so_data (so, rt[0]->stride);
so_reloc (so, rt[0]->buffer, rt[0]->offset, rt_flags |
so_reloc (so, nv40_surface_buffer(rt[0]), rt[0]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) {
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR1, 1);
so_reloc (so, rt[1]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv40_surface_buffer(rt[1]), 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->screen->curie, NV40TCL_COLOR1_OFFSET, 2);
so_reloc (so, rt[1]->buffer, rt[1]->offset, rt_flags |
so_reloc (so, nv40_surface_buffer(rt[1]), rt[1]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_data (so, rt[1]->stride);
}
if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) {
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR2, 1);
so_reloc (so, rt[2]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv40_surface_buffer(rt[2]), 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->screen->curie, NV40TCL_COLOR2_OFFSET, 1);
so_reloc (so, rt[2]->buffer, rt[2]->offset, rt_flags |
so_reloc (so, nv40_surface_buffer(rt[2]), rt[2]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, nv40->screen->curie, NV40TCL_COLOR2_PITCH, 1);
so_data (so, rt[2]->stride);
@ -105,11 +112,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40)
if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) {
so_method(so, nv40->screen->curie, NV40TCL_DMA_COLOR3, 1);
so_reloc (so, rt[3]->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv40_surface_buffer(rt[3]), 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->screen->curie, NV40TCL_COLOR3_OFFSET, 1);
so_reloc (so, rt[3]->buffer, rt[3]->offset, rt_flags |
so_reloc (so, nv40_surface_buffer(rt[3]), rt[3]->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, nv40->screen->curie, NV40TCL_COLOR3_PITCH, 1);
so_data (so, rt[3]->stride);
@ -117,11 +124,11 @@ nv40_state_framebuffer_validate(struct nv40_context *nv40)
if (zeta_format) {
so_method(so, nv40->screen->curie, NV40TCL_DMA_ZETA, 1);
so_reloc (so, zeta->buffer, 0, rt_flags | NOUVEAU_BO_OR,
so_reloc (so, nv40_surface_buffer(zeta), 0, rt_flags | NOUVEAU_BO_OR,
nv40->nvws->channel->vram->handle,
nv40->nvws->channel->gart->handle);
so_method(so, nv40->screen->curie, NV40TCL_ZETA_OFFSET, 1);
so_reloc (so, zeta->buffer, zeta->offset, rt_flags |
so_reloc (so, nv40_surface_buffer(zeta), zeta->offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, nv40->screen->curie, NV40TCL_ZETA_PITCH, 1);
so_data (so, zeta->stride);

7
src/gallium/drivers/nv50/nv50_context.h
View file

@ -99,6 +99,13 @@ nv50_surface(struct pipe_surface *pt)
return (struct nv50_surface *)pt;
}
static INLINE struct pipe_buffer *
nv50_surface_buffer(struct pipe_surface *surface)
{
struct nv50_miptree *mt = (struct nv50_miptree *)surface->texture;
return mt->buffer;
}
struct nv50_state {
unsigned dirty;

6
src/gallium/drivers/nv50/nv50_miptree.c
View file

@ -179,7 +179,7 @@ nv50_miptree_sync(struct pipe_screen *pscreen, struct nv50_miptree *mt,
}
/* The reverse of the above */
void
static void
nv50_miptree_sync_cpu(struct pipe_screen *pscreen, struct nv50_miptree *mt,
unsigned level, unsigned image)
{
@ -232,7 +232,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
if (!ps)
return NULL;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(pscreen, &ps->buffer, mt->buffer);
ps->format = pt->format;
ps->width = pt->width[level];
ps->height = pt->height[level];
@ -253,7 +252,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
ps->offset = 0;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(pscreen, &ps->buffer, lvl->image[img]);
if (flags & PIPE_BUFFER_USAGE_CPU_WRITE)
mark_dirty(lvl->image_dirty_cpu, img);
@ -262,7 +260,6 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
ps->offset = lvl->image_offset[img];
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(pscreen, &ps->buffer, mt->buffer);
if (flags & PIPE_BUFFER_USAGE_GPU_WRITE)
mark_dirty(lvl->image_dirty_gpu, img);
@ -282,7 +279,6 @@ nv50_miptree_surface_del(struct pipe_screen *pscreen,
if (--ps->refcount <= 0) {
pipe_texture_reference(&ps->texture, NULL);
pipe_buffer_reference(pscreen, &ps->buffer, NULL);
FREE(s);
}
}

2
src/gallium/drivers/nv50/nv50_program.c
View file

@ -970,7 +970,7 @@ nv50_program_tx_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
}
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i];
const struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i];
if (fs->SrcRegister.File == TGSI_FILE_SAMPLER)
unit = fs->SrcRegister.Index;

8
src/gallium/drivers/nv50/nv50_state_validate.c
View file

@ -46,9 +46,9 @@ nv50_state_validate_fb(struct nv50_context *nv50)
so_data (so, fb->cbufs[i]->height);
so_method(so, tesla, NV50TCL_RT_ADDRESS_HIGH(i), 5);
so_reloc (so, fb->cbufs[i]->buffer, fb->cbufs[i]->offset,
so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, fb->cbufs[i]->buffer, fb->cbufs[i]->offset,
so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0);
switch (fb->cbufs[i]->format) {
case PIPE_FORMAT_A8R8G8B8_UNORM:
@ -81,9 +81,9 @@ nv50_state_validate_fb(struct nv50_context *nv50)
}
so_method(so, tesla, NV50TCL_ZETA_ADDRESS_HIGH, 5);
so_reloc (so, fb->zsbuf->buffer, fb->zsbuf->offset,
so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, fb->zsbuf->buffer, fb->zsbuf->offset,
so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW, 0, 0);
switch (fb->zsbuf->format) {
case PIPE_FORMAT_Z24S8_UNORM:

4
src/gallium/drivers/nv50/nv50_surface.c
View file

@ -65,7 +65,7 @@ nv50_surface_map(struct pipe_screen *screen, struct pipe_surface *ps,
{
struct pipe_winsys *ws = screen->winsys;
return ws->buffer_map(ws, ps->buffer, flags);
return ws->buffer_map(ws, nv50_surface_buffer(ps), flags);
}
static void
@ -73,7 +73,7 @@ nv50_surface_unmap(struct pipe_screen *pscreen, struct pipe_surface *ps)
{
struct pipe_winsys *ws = pscreen->winsys;
ws->buffer_unmap(ws, ps->buffer);
ws->buffer_unmap(ws, nv50_surface_buffer(ps));
}
void

21
src/gallium/drivers/softpipe/sp_texture.c
View file

@ -211,11 +211,9 @@ softpipe_get_tex_surface(struct pipe_screen *screen,
assert(level <= pt->last_level);
ps = CALLOC_STRUCT(pipe_surface);
ps->refcount = 1;
if (ps) {
assert(ps->refcount);
ps->refcount = 1;
pipe_texture_reference(&ps->texture, pt);
pipe_buffer_reference(screen, &ps->buffer, spt->buffer);
ps->format = pt->format;
ps->block = pt->block;
ps->width = pt->width[level];
@ -225,7 +223,7 @@ softpipe_get_tex_surface(struct pipe_screen *screen,
ps->stride = spt->stride[level];
ps->offset = spt->level_offset[level];
ps->usage = usage;
/* Because we are softpipe, anything that the state tracker
* thought was going to be done with the GPU will actually get
* done with the CPU. Let's adjust the flags to take that into
@ -274,8 +272,7 @@ softpipe_tex_surface_release(struct pipe_screen *screen,
*/
assert ((*s)->texture);
if (--surf->refcount == 0) {
pipe_texture_reference(&surf->texture, NULL);
pipe_buffer_reference(screen, &surf->buffer, NULL);
pipe_texture_reference(&surf->texture, NULL);
FREE(surf);
}
*s = NULL;
@ -288,13 +285,16 @@ softpipe_surface_map( struct pipe_screen *screen,
unsigned flags )
{
ubyte *map;
struct softpipe_texture *spt;
if (flags & ~surface->usage) {
assert(0);
return NULL;
}
map = pipe_buffer_map( screen, surface->buffer, flags );
assert(surface->texture);
spt = softpipe_texture(surface->texture);
map = pipe_buffer_map(screen, spt->buffer, flags);
if (map == NULL)
return NULL;
@ -318,7 +318,12 @@ static void
softpipe_surface_unmap(struct pipe_screen *screen,
struct pipe_surface *surface)
{
pipe_buffer_unmap( screen, surface->buffer );
struct softpipe_texture *spt;
assert(surface->texture);
spt = softpipe_texture(surface->texture);
pipe_buffer_unmap( screen, spt->buffer );
}

2
src/gallium/drivers/softpipe/sp_tile_cache.c
View file

@ -369,7 +369,7 @@ sp_flush_tile_cache(struct softpipe_context *softpipe,
struct pipe_surface *ps = tc->surface;
int inuse = 0, pos;
if (ps && ps->buffer) {
if (ps) {
/* caching a drawing surface */
for (pos = 0; pos < NUM_ENTRIES; pos++) {
struct softpipe_cached_tile *tile = tc->entries + pos;

1
src/gallium/drivers/trace/tr_state.c
View file

@ -397,7 +397,6 @@ void trace_dump_surface(const struct pipe_surface *state)
trace_dump_struct_begin("pipe_surface");
trace_dump_member(ptr, state, buffer);
trace_dump_member(format, state, format);
trace_dump_member(uint, state, status);
trace_dump_member(uint, state, clear_value);

1
src/gallium/include/pipe/p_state.h
View file

@ -276,7 +276,6 @@ struct pipe_sampler_state
*/
struct pipe_surface
{
struct pipe_buffer *buffer; /**< surface's buffer/memory */
enum pipe_format format; /**< PIPE_FORMAT_x */
unsigned status; /**< PIPE_SURFACE_STATUS_x */
unsigned clear_value; /**< XXX may be temporary */

5
src/gallium/winsys/egl_xlib/egl_xlib.c
View file

@ -41,6 +41,7 @@
#include "pipe/internal/p_winsys_screen.h"
#include "util/u_memory.h"
#include "softpipe/sp_winsys.h"
#include "softpipe/sp_texture.h"
#include "eglconfig.h"
#include "eglconfigutil.h"
@ -292,7 +293,7 @@ display_surface(struct pipe_winsys *pws,
assert(ximage->format);
assert(ximage->bitmap_unit);
data = pws->buffer_map(pws, psurf->buffer, 0);
data = pws->buffer_map(pws, softpipe_texture(psurf->texture)->buffer, 0);
/* update XImage's fields */
ximage->data = data;
@ -308,7 +309,7 @@ display_surface(struct pipe_winsys *pws,
ximage->data = NULL;
XDestroyImage(ximage);
pws->buffer_unmap(pws, psurf->buffer);
pws->buffer_unmap(pws, softpipe_texture(psurf->texture)->buffer);
}

4
src/gallium/winsys/xlib/Makefile
View file

@ -22,11 +22,11 @@ INCLUDE_DIRS = \
-I$(TOP)/src/gallium/state_trackers/glx/xlib \
-I$(TOP)/src/gallium/auxiliary
DEFINES = \
DEFINES += \
-DGALLIUM_SOFTPIPE \
-DGALLIUM_CELL \
-DGALLIUM_TRACE \
-DGALLIUM_BRW
#-DGALLIUM_CELL will be defined by the config */
XLIB_WINSYS_SOURCES = \
xlib.c \

13
src/gallium/winsys/xlib/xlib_brw_screen.c
View file

@ -42,12 +42,19 @@
#include "util/u_memory.h"
#include "i965simple/brw_winsys.h"
#include "i965simple/brw_screen.h"
#include "i965simple/brw_context.h"
#include "xlib_brw_aub.h"
#include "xlib_brw.h"
#include "xlib.h"
static struct pipe_buffer *
buffer_from_surface(struct pipe_surface *surface)
{
struct brw_texture *texture = (struct brw_texture *)surface;
return texture->buffer;
}
struct aub_buffer {
char *data;
@ -226,7 +233,7 @@ aub_flush_frontbuffer( struct pipe_winsys *winsys,
// struct aub_pipe_winsys *iws = aub_pipe_winsys(winsys);
brw_aub_dump_bmp( global_winsys->aubfile,
surface,
aub_bo(surface->buffer)->offset );
aub_bo(buffer_from_surface(surface))->offset );
}
@ -449,7 +456,7 @@ xlib_brw_display_surface(struct xmesa_buffer *b,
{
brw_aub_dump_bmp( global_winsys->aubfile,
surf,
aub_bo(surf->buffer)->offset );
aub_bo(buffer_from_surface(surf))->offset );
}

4
src/gallium/winsys/xlib/xlib_cell.c
View file

@ -51,6 +51,7 @@
#include "cell/ppu/cell_context.h"
#include "cell/ppu/cell_screen.h"
#include "cell/ppu/cell_winsys.h"
#include "cell/ppu/cell_texture.h"
/**
@ -164,7 +165,8 @@ static void
xlib_cell_display_surface(struct xmesa_buffer *b, struct pipe_surface *surf)
{
XImage *ximage;
struct xm_buffer *xm_buf = xm_buffer(surf->buffer);
struct xm_buffer *xm_buf = xm_buffer(
cell_texture(surf->texture)->buffer);
const uint tilesPerRow = (surf->width + TILE_SIZE - 1) / TILE_SIZE;
uint x, y;

8
src/gallium/winsys/xlib/xlib_softpipe.c
View file

@ -45,6 +45,7 @@
#include "util/u_math.h"
#include "util/u_memory.h"
#include "softpipe/sp_winsys.h"
#include "softpipe/sp_texture.h"
#include "xlib.h"
@ -58,7 +59,7 @@ struct xm_buffer
boolean userBuffer; /** Is this a user-space buffer? */
void *data;
void *mapped;
XImage *tempImage;
int shm;
XShmSegmentInfo shminfo;
@ -225,11 +226,12 @@ xm_buffer_destroy(struct pipe_winsys *pws,
* by the XMesaBuffer.
*/
static void
xlib_softpipe_display_surface(struct xmesa_buffer *b,
xlib_softpipe_display_surface(struct xmesa_buffer *b,
struct pipe_surface *surf)
{
XImage *ximage;
struct xm_buffer *xm_buf = xm_buffer(surf->buffer);
struct xm_buffer *xm_buf = xm_buffer(
softpipe_texture(surf->texture)->buffer);
static boolean no_swap = 0;
static boolean firsttime = 1;

1
src/mesa/state_tracker/st_cb_fbo.c
View file

@ -171,7 +171,6 @@ st_renderbuffer_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb,
surface_usage );
assert(strb->surface->texture);
assert(strb->surface->buffer);
assert(strb->surface->format);
assert(strb->surface->block.size);
assert(strb->surface->block.width);

12
src/mesa/state_tracker/st_gen_mipmap.c
View file

@ -128,11 +128,11 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target,
dstSurf = screen->get_tex_surface(screen, pt, face, dstLevel, zslice,
PIPE_BUFFER_USAGE_CPU_WRITE);
srcData = (ubyte *) pipe_buffer_map(pipe->screen, srcSurf->buffer,
PIPE_BUFFER_USAGE_CPU_READ)
srcData = (ubyte *) pipe_surface_map(srcSurf,
PIPE_BUFFER_USAGE_CPU_READ)
+ srcSurf->offset;
dstData = (ubyte *) pipe_buffer_map(pipe->screen, dstSurf->buffer,
PIPE_BUFFER_USAGE_CPU_WRITE)
dstData = (ubyte *) pipe_surface_map(dstSurf,
PIPE_BUFFER_USAGE_CPU_WRITE)
+ dstSurf->offset;
_mesa_generate_mipmap_level(target, datatype, comps,
@ -144,8 +144,8 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target,
dstData,
dstSurf->stride); /* stride in bytes */
pipe_buffer_unmap(pipe->screen, srcSurf->buffer);
pipe_buffer_unmap(pipe->screen, dstSurf->buffer);
pipe_surface_unmap(srcSurf);
pipe_surface_unmap(dstSurf);
pipe_surface_reference(&srcSurf, NULL);
pipe_surface_reference(&dstSurf, NULL);