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pan/bit: Add csel tests
..and pull out common instruction generation to reduce duplication in tests a bit. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4458>
This commit is contained in:
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9b262208b6
commit
50476efb61
4 changed files with 62 additions and 26 deletions
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@ -279,7 +279,7 @@ bi_print_load_vary(struct bi_load_vary *load, FILE *fp)
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fprintf(fp, ".flat");
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}
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static const char *
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const char *
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bi_cond_name(enum bi_cond cond)
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{
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switch (cond) {
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@ -39,6 +39,7 @@ const char * bi_csel_cond_name(enum bifrost_csel_cond cond);
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const char * bi_interp_mode_name(enum bifrost_interp_mode mode);
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const char * bi_ldst_type_name(enum bifrost_ldst_type type);
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const char * bi_class_name(enum bi_class cl);
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const char * bi_cond_name(enum bi_cond cond);
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void bi_print_instruction(bi_instruction *ins, FILE *fp);
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void bi_print_bundle(bi_bundle *bundle, FILE *fp);
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@ -164,6 +164,25 @@ bit_generate_vector(uint32_t *mem)
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mem[i] = rand();
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}
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static bi_instruction
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bit_ins(enum bi_class C, unsigned argc, nir_alu_type base, unsigned size)
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{
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nir_alu_type T = base | size;
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bi_instruction ins = {
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.type = C,
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.dest = BIR_INDEX_REGISTER | 0,
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.dest_type = T,
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};
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for (unsigned i = 0; i < argc; ++i) {
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ins.src[i] = BIR_INDEX_REGISTER | i;
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ins.src_types[i] = T;
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}
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return ins;
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}
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/* Tests all 64 combinations of floating point modifiers for a given
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* instruction / floating-type / test type */
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@ -172,18 +191,7 @@ bit_fmod_helper(struct panfrost_device *dev,
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enum bi_class c, unsigned size, bool fma,
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uint32_t *input, enum bit_debug debug)
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{
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nir_alu_type T = nir_type_float | size;
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bi_instruction ins = {
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.type = c,
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.src = {
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BIR_INDEX_REGISTER | 0,
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BIR_INDEX_REGISTER | 1,
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},
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.src_types = { T, T },
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.dest = BIR_INDEX_REGISTER | 2,
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.dest_type = T,
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};
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bi_instruction ins = bit_ins(c, 2, nir_type_float, size);
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for (unsigned outmod = 0; outmod < 4; ++outmod) {
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for (unsigned inmod = 0; inmod < 16; ++inmod) {
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@ -213,19 +221,7 @@ static void
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bit_fma_helper(struct panfrost_device *dev,
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unsigned size, uint32_t *input, enum bit_debug debug)
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{
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nir_alu_type T = nir_type_float | size;
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bi_instruction ins = {
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.type = BI_FMA,
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.src = {
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BIR_INDEX_REGISTER | 0,
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BIR_INDEX_REGISTER | 1,
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BIR_INDEX_REGISTER | 2,
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},
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.src_types = { T, T, T },
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.dest = BIR_INDEX_REGISTER | 3,
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.dest_type = T,
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};
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bi_instruction ins = bit_ins(BI_FMA, 3, nir_type_float, size);
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for (unsigned outmod = 0; outmod < 4; ++outmod) {
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for (unsigned inmod = 0; inmod < 8; ++inmod) {
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@ -244,7 +240,24 @@ bit_fma_helper(struct panfrost_device *dev,
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}
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}
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static void
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bit_csel_helper(struct panfrost_device *dev,
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unsigned size, uint32_t *input, enum bit_debug debug)
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{
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bi_instruction ins = bit_ins(BI_CSEL, 4, nir_type_uint, size);
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/* SCHEDULER: We can only read 3 registers at once. */
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ins.src[2] = ins.src[0];
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for (enum bi_cond cond = BI_COND_LT; cond <= BI_COND_NE; ++cond) {
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ins.csel_cond = cond;
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if (!bit_test_single(dev, &ins, input, true, debug)) {
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fprintf(stderr, "FAIL: csel%u.%s\n",
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size, bi_cond_name(cond));
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}
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}
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}
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void
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bit_fmod(struct panfrost_device *dev, enum bit_debug debug)
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@ -286,3 +299,24 @@ bit_fma(struct panfrost_device *dev, enum bit_debug debug)
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bit_fma_helper(dev, sz, input, debug);
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}
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}
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void
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bit_csel(struct panfrost_device *dev, enum bit_debug debug)
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{
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float input32[4] = { 0.2, 1.6, -3.5, 3.0 };
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uint32_t input16[4] = {
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_mesa_float_to_half(input32[0]) | (_mesa_float_to_half(-1.8) << 16),
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_mesa_float_to_half(input32[1]) | (_mesa_float_to_half(0.6) << 16),
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_mesa_float_to_half(input32[1]) | (_mesa_float_to_half(16.2) << 16),
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_mesa_float_to_half(input32[2]) | (_mesa_float_to_half(4.9) << 16),
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};
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for (unsigned sz = 32; sz <= 32; sz *= 2) {
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uint32_t *input =
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(sz == 16) ? input16 :
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(uint32_t *) input32;
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bit_csel_helper(dev, sz, input, debug);
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}
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}
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@ -71,6 +71,7 @@ bit_step(struct bit_state *s, bi_instruction *ins, bool FMA);
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void bit_fmod(struct panfrost_device *dev, enum bit_debug debug);
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void bit_fma(struct panfrost_device *dev, enum bit_debug debug);
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void bit_csel(struct panfrost_device *dev, enum bit_debug debug);
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#endif
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