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ac: Add has_taskmesh_indirect0_bug field to ac_gpu_info struct.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20097>
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2 changed files with 8 additions and 0 deletions
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@ -1133,6 +1133,12 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info)
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(info->gfx_level == GFX9 &&
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info->me_fw_feature >= 52);
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/* Firmware bug with DISPATCH_TASKMESH_INDIRECT_MULTI_ACE packets.
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* On old MEC FW versions, it hangs the GPU when indirect count is zero.
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*/
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info->has_taskmesh_indirect0_bug = info->gfx_level == GFX10_3 &&
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info->mec_fw_version < 100;
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info->has_export_conflict_bug = info->gfx_level == GFX11;
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/* Get the number of good compute units. */
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@ -1483,6 +1489,7 @@ void ac_print_gpu_info(struct radeon_info *info, FILE *f)
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fprintf(f, " has_sqtt_auto_flush_mode_bug = %i\n", info->has_sqtt_auto_flush_mode_bug);
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fprintf(f, " never_send_perfcounter_stop = %i\n", info->never_send_perfcounter_stop);
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fprintf(f, " discardable_allows_big_page = %i\n", info->discardable_allows_big_page);
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fprintf(f, " has_taskmesh_indirect0_bug = %i\n", info->has_taskmesh_indirect0_bug);
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fprintf(f, "Display features:\n");
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fprintf(f, " use_display_dcc_unaligned = %u\n", info->use_display_dcc_unaligned);
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@ -118,6 +118,7 @@ struct radeon_info {
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bool discardable_allows_big_page;
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bool has_export_conflict_bug;
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bool has_vrs_ds_export_bug;
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bool has_taskmesh_indirect0_bug;
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/* Display features. */
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/* There are 2 display DCC codepaths, because display expects unaligned DCC. */
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