mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-05 00:58:05 +02:00
freedreno/ir3: rename ir3_compile -> ir3_context
Having both an ir3_compile (which was really context for compiling a single shader variant) and ir3_compiler (which is the compiler object that compiles all variants, ie. basically holds the RA regset) is a bit confusing. Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark
parent
9a0465b3a3
commit
5009dc55f2
1 changed files with 57 additions and 57 deletions
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@ -43,7 +43,7 @@
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#include "ir3.h"
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struct ir3_compile {
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struct ir3_context {
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struct ir3_compiler *compiler;
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struct nir_shader *s;
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@ -146,20 +146,20 @@ struct ir3_compile {
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};
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/* gpu pointer size in units of 32bit registers/slots */
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static unsigned pointer_size(struct ir3_compile *ctx)
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static unsigned pointer_size(struct ir3_context *ctx)
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{
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return (ctx->compiler->gpu_id >= 500) ? 2 : 1;
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}
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static struct ir3_instruction * create_immed(struct ir3_block *block, uint32_t val);
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static struct ir3_block * get_block(struct ir3_compile *ctx, nir_block *nblock);
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static struct ir3_block * get_block(struct ir3_context *ctx, nir_block *nblock);
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static struct ir3_compile *
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static struct ir3_context *
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compile_init(struct ir3_compiler *compiler,
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struct ir3_shader_variant *so)
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{
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struct ir3_compile *ctx = rzalloc(NULL, struct ir3_compile);
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struct ir3_context *ctx = rzalloc(NULL, struct ir3_context);
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if (compiler->gpu_id >= 400) {
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/* need special handling for "flat" */
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@ -268,7 +268,7 @@ compile_init(struct ir3_compiler *compiler,
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}
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static void
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compile_error(struct ir3_compile *ctx, const char *format, ...)
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compile_error(struct ir3_context *ctx, const char *format, ...)
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{
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va_list ap;
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va_start(ap, format);
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@ -284,13 +284,13 @@ compile_error(struct ir3_compile *ctx, const char *format, ...)
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} while (0)
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static void
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compile_free(struct ir3_compile *ctx)
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compile_free(struct ir3_context *ctx)
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{
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ralloc_free(ctx);
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}
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static void
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declare_array(struct ir3_compile *ctx, nir_register *reg)
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declare_array(struct ir3_context *ctx, nir_register *reg)
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{
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struct ir3_array *arr = rzalloc(ctx, struct ir3_array);
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arr->id = ++ctx->num_arrays;
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@ -308,7 +308,7 @@ declare_array(struct ir3_compile *ctx, nir_register *reg)
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}
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static struct ir3_array *
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get_array(struct ir3_compile *ctx, nir_register *reg)
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get_array(struct ir3_context *ctx, nir_register *reg)
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{
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list_for_each_entry (struct ir3_array, arr, &ctx->ir->array_list, node) {
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if (arr->r == reg)
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@ -320,7 +320,7 @@ get_array(struct ir3_compile *ctx, nir_register *reg)
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/* relative (indirect) if address!=NULL */
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static struct ir3_instruction *
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create_array_load(struct ir3_compile *ctx, struct ir3_array *arr, int n,
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create_array_load(struct ir3_context *ctx, struct ir3_array *arr, int n,
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struct ir3_instruction *address)
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{
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struct ir3_block *block = ctx->block;
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@ -348,7 +348,7 @@ create_array_load(struct ir3_compile *ctx, struct ir3_array *arr, int n,
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/* relative (indirect) if address!=NULL */
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static struct ir3_instruction *
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create_array_store(struct ir3_compile *ctx, struct ir3_array *arr, int n,
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create_array_store(struct ir3_context *ctx, struct ir3_array *arr, int n,
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struct ir3_instruction *src, struct ir3_instruction *address)
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{
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struct ir3_block *block = ctx->block;
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@ -378,7 +378,7 @@ create_array_store(struct ir3_compile *ctx, struct ir3_array *arr, int n,
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* insert in def_ht
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*/
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static struct ir3_instruction **
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get_dst_ssa(struct ir3_compile *ctx, nir_ssa_def *dst, unsigned n)
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get_dst_ssa(struct ir3_context *ctx, nir_ssa_def *dst, unsigned n)
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{
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struct ir3_instruction **value =
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ralloc_array(ctx->def_ht, struct ir3_instruction *, n);
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@ -387,7 +387,7 @@ get_dst_ssa(struct ir3_compile *ctx, nir_ssa_def *dst, unsigned n)
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}
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static struct ir3_instruction **
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get_dst(struct ir3_compile *ctx, nir_dest *dst, unsigned n)
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get_dst(struct ir3_context *ctx, nir_dest *dst, unsigned n)
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{
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struct ir3_instruction **value;
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@ -407,10 +407,10 @@ get_dst(struct ir3_compile *ctx, nir_dest *dst, unsigned n)
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return value;
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}
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static struct ir3_instruction * get_addr(struct ir3_compile *ctx, struct ir3_instruction *src, int align);
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static struct ir3_instruction * get_addr(struct ir3_context *ctx, struct ir3_instruction *src, int align);
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static struct ir3_instruction * const *
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get_src(struct ir3_compile *ctx, nir_src *src)
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get_src(struct ir3_context *ctx, nir_src *src)
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{
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if (src->is_ssa) {
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struct hash_entry *entry;
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@ -440,7 +440,7 @@ get_src(struct ir3_compile *ctx, nir_src *src)
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}
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static void
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put_dst(struct ir3_compile *ctx, nir_dest *dst)
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put_dst(struct ir3_context *ctx, nir_dest *dst)
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{
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if (!dst->is_ssa) {
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nir_register *reg = dst->reg.reg;
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@ -539,7 +539,7 @@ create_addr(struct ir3_block *block, struct ir3_instruction *src, int align)
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* sequences for each use of a given NIR level src as address
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*/
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static struct ir3_instruction *
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get_addr(struct ir3_compile *ctx, struct ir3_instruction *src, int align)
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get_addr(struct ir3_context *ctx, struct ir3_instruction *src, int align)
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{
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struct ir3_instruction *addr;
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unsigned idx = align - 1;
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@ -563,7 +563,7 @@ get_addr(struct ir3_compile *ctx, struct ir3_instruction *src, int align)
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}
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static struct ir3_instruction *
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get_predicate(struct ir3_compile *ctx, struct ir3_instruction *src)
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get_predicate(struct ir3_context *ctx, struct ir3_instruction *src)
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{
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struct ir3_block *b = ctx->block;
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struct ir3_instruction *cond;
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@ -579,7 +579,7 @@ get_predicate(struct ir3_compile *ctx, struct ir3_instruction *src)
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}
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static struct ir3_instruction *
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create_uniform(struct ir3_compile *ctx, unsigned n)
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create_uniform(struct ir3_context *ctx, unsigned n)
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{
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struct ir3_instruction *mov;
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@ -594,7 +594,7 @@ create_uniform(struct ir3_compile *ctx, unsigned n)
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}
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static struct ir3_instruction *
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create_uniform_indirect(struct ir3_compile *ctx, int n,
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create_uniform_indirect(struct ir3_context *ctx, int n,
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struct ir3_instruction *address)
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{
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struct ir3_instruction *mov;
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@ -628,7 +628,7 @@ create_collect(struct ir3_block *block, struct ir3_instruction *const *arr,
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}
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static struct ir3_instruction *
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create_indirect_load(struct ir3_compile *ctx, unsigned arrsz, int n,
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create_indirect_load(struct ir3_context *ctx, unsigned arrsz, int n,
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struct ir3_instruction *address, struct ir3_instruction *collect)
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{
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struct ir3_block *block = ctx->block;
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@ -670,7 +670,7 @@ create_input(struct ir3_block *block, unsigned n)
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}
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static struct ir3_instruction *
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create_frag_input(struct ir3_compile *ctx, bool use_ldlv)
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create_frag_input(struct ir3_context *ctx, bool use_ldlv)
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{
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struct ir3_block *block = ctx->block;
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struct ir3_instruction *instr;
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@ -690,7 +690,7 @@ create_frag_input(struct ir3_compile *ctx, bool use_ldlv)
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}
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static struct ir3_instruction *
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create_frag_coord(struct ir3_compile *ctx, unsigned comp)
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create_frag_coord(struct ir3_context *ctx, unsigned comp)
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{
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struct ir3_block *block = ctx->block;
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struct ir3_instruction *instr;
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@ -727,7 +727,7 @@ create_frag_coord(struct ir3_compile *ctx, unsigned comp)
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}
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static struct ir3_instruction *
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create_driver_param(struct ir3_compile *ctx, enum ir3_driver_param dp)
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create_driver_param(struct ir3_context *ctx, enum ir3_driver_param dp)
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{
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/* first four vec4 sysval's reserved for UBOs: */
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/* NOTE: dp is in scalar, but there can be >4 dp components: */
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@ -811,7 +811,7 @@ ir3_n2b(struct ir3_block *block, struct ir3_instruction *instr)
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*/
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static void
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emit_alu(struct ir3_compile *ctx, nir_alu_instr *alu)
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emit_alu(struct ir3_context *ctx, nir_alu_instr *alu)
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{
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const nir_op_info *info = &nir_op_infos[alu->op];
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struct ir3_instruction **dst, *src[info->num_inputs];
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@ -1151,7 +1151,7 @@ emit_alu(struct ir3_compile *ctx, nir_alu_instr *alu)
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/* handles direct/indirect UBO reads: */
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static void
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emit_intrinsic_load_ubo(struct ir3_compile *ctx, nir_intrinsic_instr *intr,
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emit_intrinsic_load_ubo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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struct ir3_instruction **dst)
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{
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struct ir3_block *b = ctx->block;
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@ -1222,7 +1222,7 @@ emit_intrinsic_load_ubo(struct ir3_compile *ctx, nir_intrinsic_instr *intr,
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}
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static void
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mark_ssbo_read(struct ir3_compile *ctx, struct ir3_instruction *instr)
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mark_ssbo_read(struct ir3_context *ctx, struct ir3_instruction *instr)
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{
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instr->regs[0]->instr = ctx->last_write;
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instr->regs[0]->flags |= IR3_REG_SSA;
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@ -1230,7 +1230,7 @@ mark_ssbo_read(struct ir3_compile *ctx, struct ir3_instruction *instr)
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}
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static void
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mark_ssbo_write(struct ir3_compile *ctx, struct ir3_instruction *instr)
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mark_ssbo_write(struct ir3_context *ctx, struct ir3_instruction *instr)
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{
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instr->regs[0]->instr = ctx->last_access;
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instr->regs[0]->flags |= IR3_REG_SSA;
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@ -1238,7 +1238,7 @@ mark_ssbo_write(struct ir3_compile *ctx, struct ir3_instruction *instr)
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}
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static void
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emit_intrinsic_load_ssbo(struct ir3_compile *ctx, nir_intrinsic_instr *intr,
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emit_intrinsic_load_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr,
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struct ir3_instruction **dst)
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{
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struct ir3_block *b = ctx->block;
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@ -1270,7 +1270,7 @@ emit_intrinsic_load_ssbo(struct ir3_compile *ctx, nir_intrinsic_instr *intr,
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/* src[] = { value, block_index, offset }. const_index[] = { write_mask } */
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static void
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emit_intrinsic_store_ssbo(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
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emit_intrinsic_store_ssbo(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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{
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struct ir3_block *b = ctx->block;
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struct ir3_instruction *stgb, *src0, *src1, *src2, *offset;
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@ -1303,7 +1303,7 @@ emit_intrinsic_store_ssbo(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
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}
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static struct ir3_instruction *
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emit_intrinsic_atomic(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
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emit_intrinsic_atomic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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{
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struct ir3_block *b = ctx->block;
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struct ir3_instruction *atomic, *ssbo, *src0, *src1, *src2, *offset;
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@ -1382,7 +1382,7 @@ emit_intrinsic_atomic(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
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return atomic;
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}
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static void add_sysval_input_compmask(struct ir3_compile *ctx,
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static void add_sysval_input_compmask(struct ir3_context *ctx,
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gl_system_value slot, unsigned compmask,
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struct ir3_instruction *instr)
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{
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@ -1401,14 +1401,14 @@ static void add_sysval_input_compmask(struct ir3_compile *ctx,
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ctx->ir->inputs[r] = instr;
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}
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static void add_sysval_input(struct ir3_compile *ctx, gl_system_value slot,
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static void add_sysval_input(struct ir3_context *ctx, gl_system_value slot,
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struct ir3_instruction *instr)
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{
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add_sysval_input_compmask(ctx, slot, 0x1, instr);
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}
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static void
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emit_intrinsic(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
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emit_intrinsic(struct ir3_context *ctx, nir_intrinsic_instr *intr)
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{
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const nir_intrinsic_info *info = &nir_intrinsic_infos[intr->intrinsic];
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struct ir3_instruction **dst;
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@ -1617,7 +1617,7 @@ emit_intrinsic(struct ir3_compile *ctx, nir_intrinsic_instr *intr)
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}
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static void
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emit_load_const(struct ir3_compile *ctx, nir_load_const_instr *instr)
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emit_load_const(struct ir3_context *ctx, nir_load_const_instr *instr)
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{
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struct ir3_instruction **dst = get_dst_ssa(ctx, &instr->def,
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instr->def.num_components);
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@ -1626,7 +1626,7 @@ emit_load_const(struct ir3_compile *ctx, nir_load_const_instr *instr)
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}
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static void
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emit_undef(struct ir3_compile *ctx, nir_ssa_undef_instr *undef)
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emit_undef(struct ir3_context *ctx, nir_ssa_undef_instr *undef)
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{
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struct ir3_instruction **dst = get_dst_ssa(ctx, &undef->def,
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undef->def.num_components);
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@ -1681,7 +1681,7 @@ tex_info(nir_tex_instr *tex, unsigned *flagsp, unsigned *coordsp)
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}
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static void
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emit_tex(struct ir3_compile *ctx, nir_tex_instr *tex)
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emit_tex(struct ir3_context *ctx, nir_tex_instr *tex)
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{
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struct ir3_block *b = ctx->block;
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struct ir3_instruction **dst, *sam, *src0[12], *src1[4];
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@ -1903,7 +1903,7 @@ emit_tex(struct ir3_compile *ctx, nir_tex_instr *tex)
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}
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static void
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emit_tex_query_levels(struct ir3_compile *ctx, nir_tex_instr *tex)
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emit_tex_query_levels(struct ir3_context *ctx, nir_tex_instr *tex)
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{
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struct ir3_block *b = ctx->block;
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struct ir3_instruction **dst, *sam;
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@ -1928,7 +1928,7 @@ emit_tex_query_levels(struct ir3_compile *ctx, nir_tex_instr *tex)
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}
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static void
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emit_tex_txs(struct ir3_compile *ctx, nir_tex_instr *tex)
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emit_tex_txs(struct ir3_context *ctx, nir_tex_instr *tex)
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{
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struct ir3_block *b = ctx->block;
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struct ir3_instruction **dst, *sam;
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@ -1972,7 +1972,7 @@ emit_tex_txs(struct ir3_compile *ctx, nir_tex_instr *tex)
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}
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static void
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emit_phi(struct ir3_compile *ctx, nir_phi_instr *nphi)
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emit_phi(struct ir3_context *ctx, nir_phi_instr *nphi)
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{
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struct ir3_instruction *phi, **dst;
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@ -1997,7 +1997,7 @@ emit_phi(struct ir3_compile *ctx, nir_phi_instr *nphi)
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* the CFG.
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*/
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static void
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resolve_phis(struct ir3_compile *ctx, struct ir3_block *block)
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resolve_phis(struct ir3_context *ctx, struct ir3_block *block)
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{
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list_for_each_entry (struct ir3_instruction, instr, &block->instr_list, node) {
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nir_phi_instr *nphi;
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@ -2030,7 +2030,7 @@ resolve_phis(struct ir3_compile *ctx, struct ir3_block *block)
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}
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static void
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emit_jump(struct ir3_compile *ctx, nir_jump_instr *jump)
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emit_jump(struct ir3_context *ctx, nir_jump_instr *jump)
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{
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switch (jump->type) {
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case nir_jump_break:
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@ -2047,7 +2047,7 @@ emit_jump(struct ir3_compile *ctx, nir_jump_instr *jump)
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}
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static void
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emit_instr(struct ir3_compile *ctx, nir_instr *instr)
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emit_instr(struct ir3_context *ctx, nir_instr *instr)
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{
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switch (instr->type) {
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case nir_instr_type_alu:
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@ -2093,7 +2093,7 @@ emit_instr(struct ir3_compile *ctx, nir_instr *instr)
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}
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static struct ir3_block *
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get_block(struct ir3_compile *ctx, nir_block *nblock)
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get_block(struct ir3_context *ctx, nir_block *nblock)
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{
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struct ir3_block *block;
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struct hash_entry *entry;
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@ -2109,7 +2109,7 @@ get_block(struct ir3_compile *ctx, nir_block *nblock)
|
|||
}
|
||||
|
||||
static void
|
||||
emit_block(struct ir3_compile *ctx, nir_block *nblock)
|
||||
emit_block(struct ir3_context *ctx, nir_block *nblock)
|
||||
{
|
||||
struct ir3_block *block = get_block(ctx, nblock);
|
||||
|
||||
|
|
@ -2136,10 +2136,10 @@ emit_block(struct ir3_compile *ctx, nir_block *nblock)
|
|||
}
|
||||
}
|
||||
|
||||
static void emit_cf_list(struct ir3_compile *ctx, struct exec_list *list);
|
||||
static void emit_cf_list(struct ir3_context *ctx, struct exec_list *list);
|
||||
|
||||
static void
|
||||
emit_if(struct ir3_compile *ctx, nir_if *nif)
|
||||
emit_if(struct ir3_context *ctx, nir_if *nif)
|
||||
{
|
||||
struct ir3_instruction *condition = get_src(ctx, &nif->condition)[0];
|
||||
|
||||
|
|
@ -2151,13 +2151,13 @@ emit_if(struct ir3_compile *ctx, nir_if *nif)
|
|||
}
|
||||
|
||||
static void
|
||||
emit_loop(struct ir3_compile *ctx, nir_loop *nloop)
|
||||
emit_loop(struct ir3_context *ctx, nir_loop *nloop)
|
||||
{
|
||||
emit_cf_list(ctx, &nloop->body);
|
||||
}
|
||||
|
||||
static void
|
||||
emit_cf_list(struct ir3_compile *ctx, struct exec_list *list)
|
||||
emit_cf_list(struct ir3_context *ctx, struct exec_list *list)
|
||||
{
|
||||
foreach_list_typed(nir_cf_node, node, node, list) {
|
||||
switch (node->type) {
|
||||
|
|
@ -2196,7 +2196,7 @@ emit_cf_list(struct ir3_compile *ctx, struct exec_list *list)
|
|||
* }
|
||||
*/
|
||||
static void
|
||||
emit_stream_out(struct ir3_compile *ctx)
|
||||
emit_stream_out(struct ir3_context *ctx)
|
||||
{
|
||||
struct ir3_shader_variant *v = ctx->so;
|
||||
struct ir3 *ir = ctx->ir;
|
||||
|
|
@ -2287,7 +2287,7 @@ emit_stream_out(struct ir3_compile *ctx)
|
|||
}
|
||||
|
||||
static void
|
||||
emit_function(struct ir3_compile *ctx, nir_function_impl *impl)
|
||||
emit_function(struct ir3_context *ctx, nir_function_impl *impl)
|
||||
{
|
||||
nir_metadata_require(impl, nir_metadata_block_index);
|
||||
|
||||
|
|
@ -2321,7 +2321,7 @@ emit_function(struct ir3_compile *ctx, nir_function_impl *impl)
|
|||
}
|
||||
|
||||
static void
|
||||
setup_input(struct ir3_compile *ctx, nir_variable *in)
|
||||
setup_input(struct ir3_context *ctx, nir_variable *in)
|
||||
{
|
||||
struct ir3_shader_variant *so = ctx->so;
|
||||
unsigned array_len = MAX2(glsl_get_length(in->type), 1);
|
||||
|
|
@ -2413,7 +2413,7 @@ setup_input(struct ir3_compile *ctx, nir_variable *in)
|
|||
}
|
||||
|
||||
static void
|
||||
setup_output(struct ir3_compile *ctx, nir_variable *out)
|
||||
setup_output(struct ir3_context *ctx, nir_variable *out)
|
||||
{
|
||||
struct ir3_shader_variant *so = ctx->so;
|
||||
unsigned array_len = MAX2(glsl_get_length(out->type), 1);
|
||||
|
|
@ -2502,7 +2502,7 @@ static const unsigned max_sysvals[SHADER_MAX] = {
|
|||
};
|
||||
|
||||
static void
|
||||
emit_instructions(struct ir3_compile *ctx)
|
||||
emit_instructions(struct ir3_context *ctx)
|
||||
{
|
||||
unsigned ninputs, noutputs;
|
||||
nir_function_impl *fxn = nir_shader_get_entrypoint(ctx->s);
|
||||
|
|
@ -2570,7 +2570,7 @@ emit_instructions(struct ir3_compile *ctx)
|
|||
* frag_face.
|
||||
*/
|
||||
static void
|
||||
fixup_frag_inputs(struct ir3_compile *ctx)
|
||||
fixup_frag_inputs(struct ir3_context *ctx)
|
||||
{
|
||||
struct ir3_shader_variant *so = ctx->so;
|
||||
struct ir3 *ir = ctx->ir;
|
||||
|
|
@ -2641,7 +2641,7 @@ fixup_frag_inputs(struct ir3_compile *ctx)
|
|||
* max tex index.
|
||||
*/
|
||||
static void
|
||||
fixup_astc_srgb(struct ir3_compile *ctx)
|
||||
fixup_astc_srgb(struct ir3_context *ctx)
|
||||
{
|
||||
struct ir3_shader_variant *so = ctx->so;
|
||||
/* indexed by original tex idx, value is newly assigned alpha sampler
|
||||
|
|
@ -2674,7 +2674,7 @@ int
|
|||
ir3_compile_shader_nir(struct ir3_compiler *compiler,
|
||||
struct ir3_shader_variant *so)
|
||||
{
|
||||
struct ir3_compile *ctx;
|
||||
struct ir3_context *ctx;
|
||||
struct ir3 *ir;
|
||||
struct ir3_instruction **inputs;
|
||||
unsigned i, j, actual_in, inloc;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue