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radv: assorted typo fixes
Trivial. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
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f660683027
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6 changed files with 11 additions and 11 deletions
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@ -238,7 +238,7 @@ static VkResult radv_create_cmd_buffer(
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cmd_buffer->queue_family_index = pool->queue_family_index;
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} else {
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/* Init the pool_link so we can safefly call list_del when we destroy
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/* Init the pool_link so we can safely call list_del when we destroy
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* the command buffer
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*/
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list_inithead(&cmd_buffer->pool_link);
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@ -1156,7 +1156,7 @@ radv_load_depth_clear_regs(struct radv_cmd_buffer *cmd_buffer,
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}
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/*
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*with DCC some colors don't require CMASK elimiation before being
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* With DCC some colors don't require CMASK elimination before being
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* used as a texture. This sets a predicate value to determine if the
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* cmask eliminate is required.
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*/
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@ -322,7 +322,7 @@ void radv_GetDescriptorSetLayoutSupport(VkDevice device,
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/*
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* Pipeline layouts. These have nothing to do with the pipeline. They are
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* just muttiple descriptor set layouts pasted together
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* just multiple descriptor set layouts pasted together.
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*/
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VkResult radv_CreatePipelineLayout(
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@ -278,7 +278,7 @@ radv_physical_device_init(struct radv_physical_device *device,
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(device->instance->perftest_flags & RADV_PERFTEST_SISCHED ? 0x1 : 0) |
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(device->instance->debug_flags & RADV_DEBUG_UNSAFE_MATH ? 0x2 : 0);
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/* The gpu id is already embeded in the uuid so we just pass "radv"
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/* The gpu id is already embedded in the uuid so we just pass "radv"
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* when creating the cache.
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*/
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char buf[VK_UUID_SIZE * 2 + 1];
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@ -300,7 +300,7 @@ radv_physical_device_init(struct radv_physical_device *device,
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device->rad_info.family == CHIP_RAVEN;
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}
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/* The mere presense of CLEAR_STATE in the IB causes random GPU hangs
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/* The mere presence of CLEAR_STATE in the IB causes random GPU hangs
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* on SI.
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*/
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device->has_clear_state = device->rad_info.chip_class >= CIK;
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@ -1466,7 +1466,7 @@ VkResult radv_CreateDevice(
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* evenly between CUs. The number is only a function of the number of CUs.
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* We can decrease the constant to decrease the scratch buffer size.
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*
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* sctx->scratch_waves must be >= the maximum posible size of
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* sctx->scratch_waves must be >= the maximum possible size of
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* 1 threadgroup, so that the hw doesn't hang from being unable
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* to start any.
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*
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@ -116,7 +116,7 @@ struct string_map_entry {
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uint32_t num;
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};
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/* We use a big string constant to avoid lots of reloctions from the entry
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/* We use a big string constant to avoid lots of relocations from the entry
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* point table to lots of little strings. The entries in the entry point table
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* store the index into this big string.
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*/
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@ -414,7 +414,7 @@ static unsigned radv_tex_dim(VkImageType image_type, VkImageViewType view_type,
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else
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return V_008F1C_SQ_RSRC_IMG_2D_ARRAY;
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default:
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unreachable("illegale image type");
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unreachable("illegal image type");
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}
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}
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@ -534,7 +534,7 @@ si_make_texture_descriptor(struct radv_device *device,
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if (device->physical_device->rad_info.chip_class >= GFX9) {
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unsigned bc_swizzle = gfx9_border_color_swizzle(swizzle);
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/* Depth is the the last accessible layer on Gfx9.
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/* Depth is the last accessible layer on Gfx9.
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* The hw doesn't need to know the total number of layers.
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*/
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if (type == V_008F1C_SQ_RSRC_IMG_3D)
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@ -2522,7 +2522,7 @@ ac_build_insert_new_block(struct radv_shader_context *ctx, const char *name)
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/* get current basic block */
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current_block = LLVMGetInsertBlock(ctx->ac.builder);
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/* chqeck if there's another block after this one */
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/* check if there's another block after this one */
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next_block = LLVMGetNextBasicBlock(current_block);
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if (next_block) {
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/* insert the new block before the next block */
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@ -2647,7 +2647,7 @@ write_tess_factors(struct radv_shader_context *ctx)
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outer[i] = LLVMGetUndef(ctx->ac.i32);
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}
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// LINES reverseal
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// LINES reversal
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if (ctx->options->key.tcs.primitive_mode == GL_ISOLINES) {
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outer[0] = out[1] = ac_lds_load(&ctx->ac, lds_outer);
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lds_outer = LLVMBuildAdd(ctx->ac.builder, lds_outer,
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