i915: Only flag context changes if the actual state is changed

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
Chris Wilson 2010-11-26 10:25:23 +00:00
parent 0b0cad38c5
commit 4f82585e27

View file

@ -169,15 +169,18 @@ i915AlphaFunc(struct gl_context * ctx, GLenum func, GLfloat ref)
struct i915_context *i915 = I915_CONTEXT(ctx);
int test = intel_translate_compare_func(func);
GLubyte refByte;
GLuint dw;
UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
S6_ALPHA_REF_MASK);
i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
(((GLuint) refByte) <<
S6_ALPHA_REF_SHIFT));
dw = i915->state.Ctx[I915_CTXREG_LIS6];
dw &= ~(S6_ALPHA_TEST_FUNC_MASK | S6_ALPHA_REF_MASK);
dw |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
(((GLuint) refByte) << S6_ALPHA_REF_SHIFT));
if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
i915->state.Ctx[I915_CTXREG_LIS6] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
}
/* This function makes sure that the proper enables are
@ -190,23 +193,32 @@ static void
i915EvalLogicOpBlendState(struct gl_context * ctx)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
GLuint dw0, dw1;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
if (RGBA_LOGICOP_ENABLED(ctx)) {
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
dw0 |= S5_LOGICOP_ENABLE;
dw1 &= ~S6_CBUF_BLEND_ENABLE;
}
else {
i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
dw0 &= ~S5_LOGICOP_ENABLE;
if (ctx->Color.BlendEnabled) {
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
dw1 |= S6_CBUF_BLEND_ENABLE;
}
else {
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
dw1 &= ~S6_CBUF_BLEND_ENABLE;
}
}
if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
dw1 != i915->state.Ctx[I915_CTXREG_LIS6]) {
i915->state.Ctx[I915_CTXREG_LIS5] = dw0;
i915->state.Ctx[I915_CTXREG_LIS6] = dw1;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
}
static void
@ -214,6 +226,7 @@ i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
{
struct i915_context *i915 = I915_CONTEXT(ctx);
GLubyte r, g, b, a;
GLuint dw;
DBG("%s\n", __FUNCTION__);
@ -222,9 +235,11 @@ i915BlendColor(struct gl_context * ctx, const GLfloat color[4])
UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
(a << 24) | (r << 16) | (g << 8) | b;
dw = (a << 24) | (r << 16) | (g << 8) | b;
if (dw != i915->state.Ctx[I915_CTXREG_BLENDCOLOR1]) {
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = dw
}
}
@ -325,27 +340,36 @@ i915DepthFunc(struct gl_context * ctx, GLenum func)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
int test = intel_translate_compare_func(func);
GLuint dw;
DBG("%s\n", __FUNCTION__);
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
dw = i915->state.Ctx[I915_CTXREG_LIS6];
dw &= ~S6_DEPTH_TEST_FUNC_MASK;
dw |= test << S6_DEPTH_TEST_FUNC_SHIFT;
if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_LIS6] = dw;
}
}
static void
i915DepthMask(struct gl_context * ctx, GLboolean flag)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
GLuint dw;
DBG("%s flag (%d)\n", __FUNCTION__, flag);
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw = i915->state.Ctx[I915_CTXREG_LIS6];
if (flag && ctx->Depth.Test)
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
dw |= S6_DEPTH_WRITE_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
dw &= ~S6_DEPTH_WRITE_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_LIS6] = dw;
}
}
@ -532,7 +556,7 @@ static void
i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
GLuint mode;
GLuint mode, dw;
DBG("%s %d\n", __FUNCTION__,
ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
@ -554,9 +578,13 @@ i915CullFaceFrontFace(struct gl_context * ctx, GLenum unused)
mode = S4_CULLMODE_BOTH;
}
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
dw = i915->state.Ctx[I915_CTXREG_LIS4];
dw &= ~S4_CULLMODE_MASK;
dw |= mode;
if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
i915->state.Ctx[I915_CTXREG_LIS4] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
}
static void
@ -690,6 +718,7 @@ i915_update_fog(struct gl_context * ctx)
GLenum mode;
GLboolean enabled;
GLboolean try_pixel_fog;
GLuint dw;
if (ctx->FragmentProgram._Current) {
/* Pull in static fog state from program */
@ -765,12 +794,16 @@ i915_update_fog(struct gl_context * ctx)
i915->vertex_fog = I915_FOG_VERTEX;
}
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
dw = i915->state.Ctx[I915_CTXREG_LIS5];
if (enabled)
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
dw |= S5_FOG_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
dw &= ~S5_FOG_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
i915->state.Ctx[I915_CTXREG_LIS5] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
/* Always enable pixel fog. Vertex fog using fog coord will conflict
* with fog code appended onto fragment program.
@ -837,6 +870,7 @@ static void
i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
GLuint dw;
switch (cap) {
case GL_TEXTURE_2D:
@ -848,11 +882,15 @@ i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
break;
case GL_ALPHA_TEST:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw = i915->state.Ctx[I915_CTXREG_LIS6];
if (state)
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
dw |= S6_ALPHA_TEST_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
dw &= ~S6_ALPHA_TEST_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
i915->state.Ctx[I915_CTXREG_LIS6] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_BLEND:
@ -872,19 +910,27 @@ i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
break;
case GL_DITHER:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw = i915->state.Ctx[I915_CTXREG_LIS5];
if (state)
i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
dw |= S5_COLOR_DITHER_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
dw &= ~S5_COLOR_DITHER_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
i915->state.Ctx[I915_CTXREG_LIS5] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_DEPTH_TEST:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw = i915->state.Ctx[I915_CTXREG_LIS6];
if (state)
i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
dw |= S6_DEPTH_TEST_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
dw &= ~S6_DEPTH_TEST_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
i915->state.Ctx[I915_CTXREG_LIS6] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
i915DepthMask(ctx, ctx->Depth.Mask);
break;
@ -900,11 +946,15 @@ i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
break;
case GL_LINE_SMOOTH:
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw = i915->state.Ctx[I915_CTXREG_LIS4];
if (state)
i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
dw |= S4_LINE_ANTIALIAS_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
dw &= ~S4_LINE_ANTIALIAS_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
i915->state.Ctx[I915_CTXREG_LIS4] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_FOG:
@ -923,13 +973,15 @@ i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
hw_stencil = (irbStencil && irbStencil->region);
}
if (hw_stencil) {
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw = i915->state.Ctx[I915_CTXREG_LIS5];
if (state)
i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
S5_STENCIL_WRITE_ENABLE);
dw |= (S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
else
i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
S5_STENCIL_WRITE_ENABLE);
dw &= ~(S5_STENCIL_TEST_ENABLE | S5_STENCIL_WRITE_ENABLE);
if (dw != i915->state.Ctx[I915_CTXREG_LIS5]) {
i915->state.Ctx[I915_CTXREG_LIS5] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
}
else {
FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
@ -959,11 +1011,15 @@ i915Enable(struct gl_context * ctx, GLenum cap, GLboolean state)
/* This state change is handled in i915_reduced_primitive_state because
* the hardware bit should only be set when rendering points.
*/
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
dw = i915->state.Ctx[I915_CTXREG_LIS4];
if (state)
i915->state.Ctx[I915_CTXREG_LIS4] |= S4_SPRITE_POINT_ENABLE;
dw |= S4_SPRITE_POINT_ENABLE;
else
i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_SPRITE_POINT_ENABLE;
dw &= ~S4_SPRITE_POINT_ENABLE;
if (dw != i915->state.Ctx[I915_CTXREG_LIS4]) {
i915->state.Ctx[I915_CTXREG_LIS4] = dw;
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
}
break;
case GL_POINT_SMOOTH: