From 4f096b994db1f024535761da1f672352e8175c89 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Mon, 11 Dec 2023 03:13:01 -0500 Subject: [PATCH] ac/nir,radeonsi: use load_cull_line_viewport_xy_scale_and_offset_amd MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Timur Kristóf Part-of: --- src/amd/common/ac_nir_cull.c | 2 +- src/gallium/drivers/radeonsi/si_nir_lower_abi.c | 9 ++++++--- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_nir_cull.c b/src/amd/common/ac_nir_cull.c index 3754ffc5c7c..766310aa045 100644 --- a/src/amd/common/ac_nir_cull.c +++ b/src/amd/common/ac_nir_cull.c @@ -248,7 +248,7 @@ cull_small_primitive_line(nir_builder *b, nir_def *pos[3][4], * It should contain no holes if this matches hw behavior. */ nir_def *v0[2], *v1[2]; - nir_def *vp = nir_load_cull_triangle_viewport_xy_scale_and_offset_amd(b); + nir_def *vp = nir_load_cull_line_viewport_xy_scale_and_offset_amd(b); /* Get vertex positions in pixels. */ for (unsigned chan = 0; chan < 2; chan++) { diff --git a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c index 68c5380b5bc..f8c687ff5e4 100644 --- a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c +++ b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c @@ -384,10 +384,13 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s break; } case nir_intrinsic_load_cull_triangle_viewport_xy_scale_and_offset_amd: { - bool prim_is_lines = key->ge.opt.ngg_culling & SI_NGG_CULL_LINES; nir_def *addr = ac_nir_load_arg(b, &args->ac, args->small_prim_cull_info); - unsigned offset = prim_is_lines ? 16 : 0; - replacement = nir_load_smem_amd(b, 4, addr, nir_imm_int(b, offset)); + replacement = nir_load_smem_amd(b, 4, addr, nir_imm_int(b, 0)); + break; + } + case nir_intrinsic_load_cull_line_viewport_xy_scale_and_offset_amd: { + nir_def *addr = ac_nir_load_arg(b, &args->ac, args->small_prim_cull_info); + replacement = nir_load_smem_amd(b, 4, addr, nir_imm_int(b, 16)); break; } case nir_intrinsic_load_num_vertices_per_primitive_amd: