diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c
index dccac6d811c..84d5759cefa 100644
--- a/src/compiler/nir/nir_divergence_analysis.c
+++ b/src/compiler/nir/nir_divergence_analysis.c
@@ -214,6 +214,7 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
    case nir_intrinsic_load_barycentric_optimize_amd:
    case nir_intrinsic_load_poly_line_smooth_enabled:
    case nir_intrinsic_load_rasterization_primitive_amd:
+   case nir_intrinsic_load_global_constant_uniform_block_intel:
       is_divergent = false;
       break;
 
diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py
index 0d83300f1d1..4ff625be1d1 100644
--- a/src/compiler/nir/nir_intrinsics.py
+++ b/src/compiler/nir/nir_intrinsics.py
@@ -1762,6 +1762,10 @@ store("ssbo_block_intel", [-1, 1], [WRITE_MASK, ACCESS, ALIGN_MUL, ALIGN_OFFSET]
 # src[] = { value, offset }.
 store("shared_block_intel", [1], [BASE, WRITE_MASK, ALIGN_MUL, ALIGN_OFFSET])
 
+# src[] = { address }.
+load("global_constant_uniform_block_intel", [1],
+     [ACCESS, ALIGN_MUL, ALIGN_OFFSET], [CAN_ELIMINATE, CAN_REORDER])
+
 # Similar to load_global_const_block_intel but for UBOs
 # offset should be uniform
 # src[] = { buffer_index, offset }.
diff --git a/src/compiler/nir/nir_opt_load_store_vectorize.c b/src/compiler/nir/nir_opt_load_store_vectorize.c
index 70c016e2cf9..777237aceec 100644
--- a/src/compiler/nir/nir_opt_load_store_vectorize.c
+++ b/src/compiler/nir/nir_opt_load_store_vectorize.c
@@ -85,6 +85,7 @@ case nir_intrinsic_##op: {\
    STORE(nir_var_mem_shared, shared, -1, 1, -1, 0)
    LOAD(nir_var_mem_global, global, -1, 0, -1)
    STORE(nir_var_mem_global, global, -1, 1, -1, 0)
+   LOAD(nir_var_mem_global, global_constant, -1, 0, -1)
    LOAD(nir_var_mem_task_payload, task_payload, -1, 0, -1)
    STORE(nir_var_mem_task_payload, task_payload, -1, 1, -1, 0)
    ATOMIC(nir_var_mem_ssbo, ssbo, 0, 1, -1, 2)
@@ -97,6 +98,7 @@ case nir_intrinsic_##op: {\
    LOAD(nir_var_mem_ubo, ubo_uniform_block_intel, 0, 1, -1)
    LOAD(nir_var_mem_ssbo, ssbo_uniform_block_intel, 0, 1, -1)
    LOAD(nir_var_mem_shared, shared_uniform_block_intel, -1, 0, -1)
+   LOAD(nir_var_mem_global, global_constant_uniform_block_intel, -1, 0, -1)
    default:
       break;
 #undef ATOMIC