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pvr: Add clear program in pvr_device.
It gets used to flush fragment work for a graphics pipeline barrier. Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com> Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18124>
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62ef714ce4
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6 changed files with 165 additions and 1 deletions
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@ -257,4 +257,14 @@ rogue_get_compute_max_work_group_size(const struct pvr_device_info *dev_info)
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return ROGUE_MAX_INSTANCES_PER_TASK * max_tasks_per_usc;
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}
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/* Don't use this directly. Use the x and y define macros. */
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static inline uint32_t
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__rogue_get_param_vf_max(const struct pvr_device_info *dev_info)
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{
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return (rogue_get_render_size_max(dev_info) * 3 / 2) - 1;
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}
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#define rogue_get_param_vf_max_x(dev_info) __rogue_get_param_vf_max(dev_info)
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#define rogue_get_param_vf_max_y(dev_info) __rogue_get_param_vf_max(dev_info)
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#endif /* ROGUE_HW_UTILS_H */
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@ -695,6 +695,7 @@ static uint32_t pvr_pds_get_bank_based_constants(uint32_t num_backs,
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* \returns Pointer to just beyond the buffer for the data - i.e the value
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* of the buffer after writing its contents.
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*/
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/* FIXME: Implement PDS_GENERATE_CODEDATA_SEGMENTS? */
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uint32_t *
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pvr_pds_vertex_shader(struct pvr_pds_vertex_shader_program *restrict program,
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uint32_t *restrict buffer,
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@ -1474,6 +1474,127 @@ static void pvr_device_finish_compute_idfwdf_state(struct pvr_device *device)
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pvr_bo_free(device, device->idfwdf_state.usc);
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}
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static VkResult
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pvr_device_init_graphics_static_clear_state(struct pvr_device *device)
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{
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struct pvr_device_static_clear_state *state = &device->static_clear_state;
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const struct pvr_device_info *dev_info = &device->pdevice->dev_info;
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const uint32_t cache_line_size = rogue_get_slc_cache_line_size(dev_info);
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const float vf_x_max = (float)rogue_get_param_vf_max_x(dev_info);
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const float vf_y_max = (float)rogue_get_param_vf_max_y(dev_info);
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const struct rogue_shader_binary *passthrough_vert_shader;
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struct pvr_pds_vertex_shader_program pds_program;
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size_t staging_buffer_size;
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uint32_t *staging_buffer;
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VkResult result;
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const float vertices[4][3] = { { 0.0f, 0.0f, 0.0f },
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{ vf_x_max, 0.0f, 0.0f },
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{ 0.0f, vf_y_max, 0.0f },
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{ vf_x_max, vf_y_max, 0.0f } };
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pvr_hard_code_get_passthrough_vertex_shader(dev_info,
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&passthrough_vert_shader);
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result = pvr_gpu_upload_usc(device,
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passthrough_vert_shader->data,
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passthrough_vert_shader->size,
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cache_line_size,
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&state->usc_vertex_shader_bo);
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if (result != VK_SUCCESS)
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return result;
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result = pvr_gpu_upload(device,
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device->heaps.general_heap,
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vertices,
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sizeof(vertices),
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sizeof(vertices[0][0]),
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&state->vertices_bo);
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if (result != VK_SUCCESS)
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goto err_free_usc_shader;
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pds_program = (struct pvr_pds_vertex_shader_program) {
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.num_streams = 1,
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.streams = {
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[0] = {
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.address = state->vertices_bo->vma->dev_addr.addr,
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.stride = sizeof(vertices[0]),
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.num_elements = 1,
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.elements = {
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[0] = {
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.size = sizeof(vertices[0]),
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},
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},
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},
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},
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};
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pvr_pds_setup_doutu(&pds_program.usc_task_control,
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state->usc_vertex_shader_bo->vma->dev_addr.addr,
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0,
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PVRX(PDSINST_DOUTU_SAMPLE_RATE_INSTANCE),
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false);
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pvr_pds_vertex_shader(&pds_program, NULL, PDS_GENERATE_SIZES, dev_info);
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staging_buffer_size =
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(pds_program.code_size + pds_program.data_size) * sizeof(*staging_buffer);
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staging_buffer = vk_alloc(&device->vk.alloc,
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staging_buffer_size,
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8,
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VK_SYSTEM_ALLOCATION_SCOPE_COMMAND);
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if (!staging_buffer)
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goto err_free_verices_buffer;
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pvr_pds_vertex_shader(&pds_program,
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staging_buffer,
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PDS_GENERATE_DATA_SEGMENT,
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dev_info);
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pvr_pds_vertex_shader(&pds_program,
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&staging_buffer[pds_program.data_size],
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PDS_GENERATE_CODE_SEGMENT,
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dev_info);
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/* FIXME: Figure out the define for alignment of 16. */
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result = pvr_gpu_upload_pds(device,
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&staging_buffer[0],
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pds_program.data_size,
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16,
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&staging_buffer[pds_program.data_size],
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pds_program.code_size,
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16,
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16,
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&state->pds);
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if (result != VK_SUCCESS)
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goto err_free_staging_buffer;
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vk_free(&device->vk.alloc, staging_buffer);
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return VK_SUCCESS;
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err_free_staging_buffer:
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vk_free(&device->vk.alloc, staging_buffer);
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err_free_verices_buffer:
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pvr_bo_free(device, state->vertices_bo);
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err_free_usc_shader:
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pvr_bo_free(device, state->usc_vertex_shader_bo);
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return result;
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}
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static void
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pvr_device_finish_graphics_static_clear_state(struct pvr_device *device)
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{
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struct pvr_device_static_clear_state *state = &device->static_clear_state;
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pvr_bo_free(device, state->pds.pvr_bo);
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pvr_bo_free(device, state->vertices_bo);
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pvr_bo_free(device, state->usc_vertex_shader_bo);
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}
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/* FIXME: We should be calculating the size when we upload the code in
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* pvr_srv_setup_static_pixel_event_program().
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*/
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@ -1659,10 +1780,14 @@ VkResult pvr_CreateDevice(VkPhysicalDevice physicalDevice,
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if (result != VK_SUCCESS)
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goto err_pvr_free_compute_fence;
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result = pvr_queues_create(device, pCreateInfo);
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result = pvr_device_init_graphics_static_clear_state(device);
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if (result != VK_SUCCESS)
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goto err_pvr_finish_compute_idfwdf;
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result = pvr_queues_create(device, pCreateInfo);
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if (result != VK_SUCCESS)
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goto err_pvr_finish_graphics_static_clear;
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pvr_device_init_default_sampler_state(device);
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if (pCreateInfo->pEnabledFeatures)
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@ -1685,6 +1810,9 @@ VkResult pvr_CreateDevice(VkPhysicalDevice physicalDevice,
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return VK_SUCCESS;
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err_pvr_finish_graphics_static_clear:
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pvr_device_finish_graphics_static_clear_state(device);
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err_pvr_finish_compute_idfwdf:
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pvr_device_finish_compute_idfwdf_state(device);
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@ -1722,6 +1850,7 @@ void pvr_DestroyDevice(VkDevice _device,
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PVR_FROM_HANDLE(pvr_device, device, _device);
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pvr_queues_destroy(device);
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pvr_device_finish_graphics_static_clear_state(device);
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pvr_device_finish_compute_idfwdf_state(device);
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pvr_bo_free(device, device->pds_compute_fence_program.pvr_bo);
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pvr_bo_free(device, device->nop_program.pds.pvr_bo);
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@ -349,3 +349,17 @@ void pvr_hard_code_get_idfwdf_program(
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*usc_shareds_out = 12U;
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*usc_temps_out = 4U;
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}
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void pvr_hard_code_get_passthrough_vertex_shader(
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const struct pvr_device_info *const dev_info,
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const struct rogue_shader_binary **const program_out)
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{
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static const struct rogue_shader_binary shader = {
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.size = 8U,
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.data = { 0, 0, 0, 0, 0, 0, 0, 0 }
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};
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mesa_loge(
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"No hard coded passthrough vertex shader. Returning empty shader.");
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*program_out = &shader;
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};
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@ -125,4 +125,8 @@ void pvr_hard_code_get_idfwdf_program(
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uint32_t *usc_shareds_out,
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uint32_t *usc_temps_out);
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void pvr_hard_code_get_passthrough_vertex_shader(
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const struct pvr_device_info *const dev_info,
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const struct rogue_shader_binary **const program_out);
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#endif /* PVR_HARDCODE_SHADERS_H */
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@ -293,6 +293,12 @@ struct pvr_device {
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struct pvr_pds_upload sw_compute_barrier_pds;
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} idfwdf_state;
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struct pvr_device_static_clear_state {
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struct pvr_bo *usc_vertex_shader_bo;
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struct pvr_bo *vertices_bo;
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struct pvr_pds_upload pds;
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} static_clear_state;
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VkPhysicalDeviceFeatures features;
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};
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