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r600g: implement clamp_fragment_color handling
The first small step to get arb_color_buffer_float working.
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parent
68cc6bc5d8
commit
4e6528428d
1 changed files with 17 additions and 6 deletions
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@ -285,7 +285,7 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
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{
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struct r600_pipe_rasterizer *rs = CALLOC_STRUCT(r600_pipe_rasterizer);
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struct r600_pipe_state *rstate;
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unsigned tmp;
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unsigned tmp, cb;
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unsigned prov_vtx = 1, polygon_dual_mode;
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unsigned clip_rule;
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@ -358,6 +358,11 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
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r600_pipe_state_add_reg(rstate, R_028DFC_PA_SU_POLY_OFFSET_CLAMP, 0x00000000, 0xFFFFFFFF, NULL);
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r600_pipe_state_add_reg(rstate, R_02820C_PA_SC_CLIPRECT_RULE, clip_rule, 0xFFFFFFFF, NULL);
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for (cb = 0; cb < 7; ++cb)
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r600_pipe_state_add_reg(rstate, R_0280A0_CB_COLOR0_INFO + cb * 4,
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S_0280A0_BLEND_CLAMP(state->clamp_fragment_color),
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S_0280A0_BLEND_CLAMP(1), NULL);
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return rstate;
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}
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@ -719,7 +724,7 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
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struct r600_surface *surf;
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unsigned level = state->cbufs[cb]->u.tex.level;
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unsigned pitch, slice;
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unsigned color_info;
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unsigned color_info, color_info_mask;
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unsigned format, swap, ntype, endian;
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unsigned offset;
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const struct util_format_description *desc;
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@ -772,22 +777,28 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
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color_info = S_0280A0_FORMAT(format) |
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S_0280A0_COMP_SWAP(swap) |
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S_0280A0_ARRAY_MODE(rtex->array_mode[level]) |
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S_0280A0_BLEND_CLAMP(1) |
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S_0280A0_NUMBER_TYPE(ntype) |
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S_0280A0_ENDIAN(endian);
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color_info_mask = 0xFFFFFFFF & ~S_0280A0_BLEND_CLAMP(1);
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/* on R600 this can't be set if BLEND_CLAMP isn't set,
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if BLEND_FLOAT32 is set of > 11 bits in a UNORM or SNORM */
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if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS &&
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desc->channel[i].size < 12)
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if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS && desc->channel[i].size < 12) {
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//TODO: Seems to work on RV710, but i have no idea what to do between R600-RV710
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if (rctx->family < CHIP_RV710) {
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color_info |= S_0280A0_BLEND_CLAMP(1);
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color_info_mask |= S_0280A0_BLEND_CLAMP(1);
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}
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color_info |= S_0280A0_SOURCE_FORMAT(V_0280A0_EXPORT_NORM);
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}
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r600_pipe_state_add_reg(rstate,
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R_028040_CB_COLOR0_BASE + cb * 4,
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(offset + r600_bo_offset(bo[0])) >> 8, 0xFFFFFFFF, bo[0]);
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r600_pipe_state_add_reg(rstate,
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R_0280A0_CB_COLOR0_INFO + cb * 4,
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color_info, 0xFFFFFFFF, NULL);
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color_info, color_info_mask, NULL);
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r600_pipe_state_add_reg(rstate,
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R_028060_CB_COLOR0_SIZE + cb * 4,
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S_028060_PITCH_TILE_MAX(pitch) |
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