pan/va: fix base-level for nir_texop_lod

The documentation says that if we don't use force_delta, the LOD will be
-infinity for non-active lanes before bias and clamp are applied. This
is not what we want, so let's instead assume all threads are active, and
let helper-invocations do their job to compute correct values.

While this is only needed for the second iteration, let's just leave it
on for both for simplicity.

Fixes: e317136536 ("pan/va: Add support for nir_texop_lod")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33069>
This commit is contained in:
Erik Faye-Lund 2025-01-16 17:34:23 +01:00 committed by Marge Bot
parent a0de5e7d02
commit 4e58029dc0
2 changed files with 1 additions and 3 deletions

View file

@ -295,8 +295,6 @@ dEQP-VK.glsl.loops.special.do_while_dynamic_iterations.dowhile_trap_vertex,Crash
dEQP-VK.rasterization.rasterization_order_attachment_access.depth.samples_1.multi_draw_barriers,Crash
dEQP-VK.rasterization.rasterization_order_attachment_access.stencil.samples_1.multi_draw_barriers,Crash
dEQP-VK.ycbcr.query.lod.fragment.r8g8b8a8_unorm,Fail
dEQP-VK.wsi.wayland.swapchain.simulate_oom.composite_alpha,Crash
dEQP-VK.wsi.wayland.swapchain.simulate_oom.exclusive_nonzero_queues,Crash
dEQP-VK.wsi.wayland.swapchain.simulate_oom.image_array_layers,Crash

View file

@ -4016,7 +4016,7 @@ bi_emit_tex_valhall(bi_builder *b, nir_tex_instr *instr)
bi_instr *I = bi_tex_gradient_to(b, grdesc, idx, src0, src1, dim,
!narrow_indices, 1, sr_count);
I->derivative_enable = false;
I->force_delta_enable = false;
I->force_delta_enable = true;
I->lod_clamp_disable = i != 0;
I->register_format = BI_REGISTER_FORMAT_U32;
bi_index lod = bi_s16_to_f32(b, bi_half(grdesc, 0));