From 4e456ebde4602bfd9793d611c8b3db923dc6c042 Mon Sep 17 00:00:00 2001 From: Job Noorman Date: Mon, 13 Apr 2026 16:47:01 +0200 Subject: [PATCH] ir3/collect_info: remove max_const calculation constlen is now directly calculated from the const allocations; no need to infer it from const reg usage anymore. Signed-off-by: Job Noorman Part-of: --- src/freedreno/ir3/ir3.c | 11 ++--------- src/freedreno/ir3/ir3.h | 1 - src/gallium/drivers/freedreno/a6xx/fd6_program.cc | 1 - 3 files changed, 2 insertions(+), 11 deletions(-) diff --git a/src/freedreno/ir3/ir3.c b/src/freedreno/ir3/ir3.c index 422277814d3..bc493a9dc76 100644 --- a/src/freedreno/ir3/ir3.c +++ b/src/freedreno/ir3/ir3.c @@ -72,15 +72,11 @@ collect_reg_info(struct ir3_shader_variant *v, struct ir3_instruction *instr, struct ir3_register *reg, struct ir3_info *info) { - if (reg->flags & IR3_REG_IMMED) { + if (reg->flags & (IR3_REG_IMMED | IR3_REG_CONST)) { /* nothing to do */ return; } - /* Shared consts don't need to be included into constlen. */ - if (is_shared_consts(v->compiler, ir3_const_state(v), reg)) - return; - unsigned components; int16_t max; @@ -92,9 +88,7 @@ collect_reg_info(struct ir3_shader_variant *v, max = (reg->num + components - 1); } - if (reg->flags & IR3_REG_CONST) { - info->max_const = MAX2(info->max_const, max >> 2); - } else if (max < regid(48, 0)) { + if (max < regid(48, 0)) { if (reg->flags & IR3_REG_HALF) { if (v->mergedregs) { /* starting w/ a6xx, half regs conflict with full regs: */ @@ -329,7 +323,6 @@ ir3_collect_info(struct ir3_shader_variant *v) memset(info, 0, sizeof(*info)); info->max_reg = -1; info->max_half_reg = -1; - info->max_const = -1; info->multi_dword_ldp_stp = false; uint32_t instr_count = 0; diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h index 83003f8682a..bddd2c352ce 100644 --- a/src/freedreno/ir3/ir3.h +++ b/src/freedreno/ir3/ir3.h @@ -51,7 +51,6 @@ struct ir3_info { */ int8_t max_reg; /* highest GPR # used by shader */ int8_t max_half_reg; - int16_t max_const; unsigned constlen; /* This is the maximum # of waves that can executed at once in one core, * assuming that they are all executing this shader. diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc index dab900f3356..5d5e3c73b50 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.cc +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.cc @@ -1584,7 +1584,6 @@ fd6_program_create(void *data, const struct ir3_shader_variant *bs, .info = { .max_reg = -1, .max_half_reg = -1, - .max_const = -1, }, }; /* The last geometry stage in use: */