From 4e253184de021f12b077461723dcbe2ff389af4e Mon Sep 17 00:00:00 2001 From: Caio Oliveira Date: Tue, 2 Sep 2025 11:28:43 -0700 Subject: [PATCH] brw: Run validation as soon as we have the CFG around Fixes: affa7567c29 ("intel/brw: Add phases to backend") Reviewed-by: Lionel Landwerlin Part-of: --- src/intel/compiler/brw_validate.cpp | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/intel/compiler/brw_validate.cpp b/src/intel/compiler/brw_validate.cpp index 1ec66e42349..4550403fb98 100644 --- a/src/intel/compiler/brw_validate.cpp +++ b/src/intel/compiler/brw_validate.cpp @@ -291,12 +291,11 @@ brw_validate(const brw_shader &s) { const intel_device_info *devinfo = s.devinfo; - if (s.cfg) - s.cfg->validate(_mesa_shader_stage_to_abbrev(s.stage)); - - if (s.phase <= BRW_SHADER_PHASE_AFTER_NIR) + if (!s.cfg) return; + s.cfg->validate(_mesa_shader_stage_to_abbrev(s.stage)); + foreach_block(block, s.cfg) { /* Track the last used address register. Usage of the address register * in the IR should be limited to within a block, otherwise we would