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radeonsi: clean up some mess around htile_stencil_disabled

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Set the final value in si_texture_create_object, so that other places
don't have to derive it redundantly.

The only thing to remember is that HTILE stencil can be enabled when
stencil is not present, and it can be disabled when stencil is present
due to various workarounds.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10003>
This commit is contained in:
Marek Olšák 2021-03-21 00:17:44 -04:00 • committed by Marge Bot
parent bcd1a69f79
commit 4dd8d58ad5
4 changed files with 15 additions and 18 deletions
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7
src/gallium/drivers/radeonsi/si_clear.c
View file

@ -714,13 +714,8 @@ static void si_fast_clear(struct si_context *sctx, unsigned *buffers,
*
* 0xfffff30f = uncompressed Z + S
* 0xfffc000f = uncompressed Z only
*
* GFX8 always uses the Z+S HTILE format for TC-compatible HTILE even
* when stencil is not present.
*/
uint32_t clear_value = (zstex->surface.has_stencil &&
!zstex->htile_stencil_disabled) ||
sctx->chip_class == GFX8 ? 0xfffff30f : 0xfffc000f;
uint32_t clear_value = !zstex->htile_stencil_disabled ? 0xfffff30f : 0xfffc000f;
assert(num_clears < ARRAY_SIZE(info));
si_init_buffer_clear(&info[num_clears++], &zstex->buffer.b.b,
zstex->surface.meta_offset, zstex->surface.meta_size, clear_value);

2
src/gallium/drivers/radeonsi/si_pipe.h
View file

@ -1842,7 +1842,7 @@ static inline bool si_can_sample_zs(struct si_texture *tex, bool stencil_sampler
static inline bool si_htile_enabled(struct si_texture *tex, unsigned level, unsigned zs_mask)
{
if (zs_mask == PIPE_MASK_S && tex->htile_stencil_disabled)
if (zs_mask == PIPE_MASK_S && (tex->htile_stencil_disabled || !tex->surface.has_stencil))
return false;
return tex->is_depth && tex->surface.meta_offset && level < tex->surface.num_meta_levels;

13
src/gallium/drivers/radeonsi/si_state.c
View file

@ -2481,15 +2481,13 @@ static void si_init_depth_surface(struct si_context *sctx, struct si_surface *su
if (si_htile_enabled(tex, level, PIPE_MASK_ZS)) {
z_info |= S_028038_TILE_SURFACE_ENABLE(1) | S_028038_ALLOW_EXPCLEAR(1);
s_info |= S_02803C_TILE_STENCIL_DISABLE(tex->htile_stencil_disabled);
if (tex->surface.has_stencil && !tex->htile_stencil_disabled) {
/* Stencil buffer workaround ported from the GFX6-GFX8 code.
* See that for explanation.
*/
s_info |= S_02803C_ALLOW_EXPCLEAR(tex->buffer.b.b.nr_samples <= 1);
} else {
/* Use all HTILE for depth if there's no stencil. */
s_info |= S_02803C_TILE_STENCIL_DISABLE(1);
}
surf->db_htile_data_base = (tex->buffer.gpu_address + tex->surface.meta_offset) >> 8;
@ -2546,6 +2544,7 @@ static void si_init_depth_surface(struct si_context *sctx, struct si_surface *su
if (si_htile_enabled(tex, level, PIPE_MASK_ZS)) {
z_info |= S_028040_TILE_SURFACE_ENABLE(1) | S_028040_ALLOW_EXPCLEAR(1);
s_info |= S_028044_TILE_STENCIL_DISABLE(tex->htile_stencil_disabled);
if (tex->surface.has_stencil) {
/* Workaround: For a not yet understood reason, the
@ -3267,14 +3266,6 @@ static void si_emit_framebuffer_state(struct si_context *sctx)
/* GFX6-GFX8 */
/* Set fields dependent on tc_compatile_htile. */
if (si_htile_enabled(tex, zb->base.u.tex.level, PIPE_MASK_ZS)) {
if (!tex->surface.has_stencil && !tex->tc_compatible_htile) {
/* Use all of the htile_buffer for depth if there's no stencil.
* This must not be set when TC-compatible HTILE is enabled
* due to a hw bug.
*/
db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1);
}
if (tex->tc_compatible_htile) {
db_htile_surface |= S_028ABC_TC_COMPATIBLE(1);

11
src/gallium/drivers/radeonsi/si_texture.c
View file

@ -984,6 +984,8 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen,
goto error;
if (tex->is_depth) {
tex->htile_stencil_disabled = !tex->surface.has_stencil;
if (sscreen->info.chip_class >= GFX9) {
tex->can_sample_z = true;
tex->can_sample_s = true;
@ -995,6 +997,15 @@ static struct si_texture *si_texture_create_object(struct pipe_screen *screen,
} else {
tex->can_sample_z = !tex->surface.u.legacy.depth_adjusted;
tex->can_sample_s = !tex->surface.u.legacy.stencil_adjusted;
/* GFX8 must keep stencil enabled because it can't use Z-only TC-compatible
* HTILE because of a hw bug. This has only a small effect on performance
* because we lose a little bit of Z precision in order to make space for
* stencil in HTILE.
*/
if (sscreen->info.chip_class == GFX8 &&
tex->surface.flags & RADEON_SURF_TC_COMPATIBLE_HTILE)
tex->htile_stencil_disabled = false;
}
tex->db_compatible = surface->flags & RADEON_SURF_ZBUFFER;