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tgsi/exec: Simplify indirects now that they always use the ADDR file.

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This was a lot of extra code in the hot path of getting though
fetch_src_file_channel().  No significant perf difference in softpipe,
though.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14360>
This commit is contained in:
Emma Anholt 2021-12-30 16:09:50 -08:00 • committed by Marge Bot
parent c00db99e0e
commit 4dc6cd5933
1 changed files with 10 additions and 46 deletions
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56
src/gallium/auxiliary/tgsi/tgsi_exec.c
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@ -1501,8 +1501,6 @@ get_index_registers(const struct tgsi_exec_machine *mach,
union tgsi_exec_channel *index, union tgsi_exec_channel *index,
union tgsi_exec_channel *index2D) union tgsi_exec_channel *index2D)
{ {
uint swizzle;
/* We start with a direct index into a register file. /* We start with a direct index into a register file.
* *
* file[1], * file[1],
@ -1526,35 +1524,17 @@ get_index_registers(const struct tgsi_exec_machine *mach,
* .x = Indirect.SwizzleX * .x = Indirect.SwizzleX
*/ */
if (reg->Register.Indirect) { if (reg->Register.Indirect) {
union tgsi_exec_channel index2;
union tgsi_exec_channel indir_index;
const uint execmask = mach->ExecMask; const uint execmask = mach->ExecMask;
uint i;
/* which address register (always zero now) */ assert(reg->Indirect.File == TGSI_FILE_ADDRESS);
index2.i[0] = const union tgsi_exec_channel *addr = &mach->Addrs[reg->Indirect.Index].xyzw[reg->Indirect.Swizzle];
index2.i[1] = for (int i = 0; i < TGSI_QUAD_SIZE; i++)
index2.i[2] = index->i[i] += addr->u[i];
index2.i[3] = reg->Indirect.Index;
/* get current value of address register[swizzle] */
swizzle = reg->Indirect.Swizzle;
fetch_src_file_channel(mach,
reg->Indirect.File,
swizzle,
&index2,
&ZeroVec,
&indir_index);
/* add value of address register to the offset */
index->i[0] += indir_index.i[0];
index->i[1] += indir_index.i[1];
index->i[2] += indir_index.i[2];
index->i[3] += indir_index.i[3];
/* for disabled execution channels, zero-out the index to /* for disabled execution channels, zero-out the index to
* avoid using a potential garbage value. * avoid using a potential garbage value.
*/ */
for (i = 0; i < TGSI_QUAD_SIZE; i++) { for (int i = 0; i < TGSI_QUAD_SIZE; i++) {
if ((execmask & (1 << i)) == 0) if ((execmask & (1 << i)) == 0)
index->i[i] = 0; index->i[i] = 0;
} }
@ -1586,33 +1566,17 @@ get_index_registers(const struct tgsi_exec_machine *mach,
* .y = DimIndirect.SwizzleX * .y = DimIndirect.SwizzleX
*/ */
if (reg->Dimension.Indirect) { if (reg->Dimension.Indirect) {
union tgsi_exec_channel index2;
union tgsi_exec_channel indir_index;
const uint execmask = mach->ExecMask; const uint execmask = mach->ExecMask;
uint i;
index2.i[0] = assert(reg->DimIndirect.File == TGSI_FILE_ADDRESS);
index2.i[1] = const union tgsi_exec_channel *addr = &mach->Addrs[reg->DimIndirect.Index].xyzw[reg->DimIndirect.Swizzle];
index2.i[2] = for (int i = 0; i < TGSI_QUAD_SIZE; i++)
index2.i[3] = reg->DimIndirect.Index; index2D->i[i] += addr->u[i];
swizzle = reg->DimIndirect.Swizzle;
fetch_src_file_channel(mach,
reg->DimIndirect.File,
swizzle,
&index2,
&ZeroVec,
&indir_index);
index2D->i[0] += indir_index.i[0];
index2D->i[1] += indir_index.i[1];
index2D->i[2] += indir_index.i[2];
index2D->i[3] += indir_index.i[3];
/* for disabled execution channels, zero-out the index to /* for disabled execution channels, zero-out the index to
* avoid using a potential garbage value. * avoid using a potential garbage value.
*/ */
for (i = 0; i < TGSI_QUAD_SIZE; i++) { for (int i = 0; i < TGSI_QUAD_SIZE; i++) {
if ((execmask & (1 << i)) == 0) { if ((execmask & (1 << i)) == 0) {
index2D->i[i] = 0; index2D->i[i] = 0;
} }