From 4dc4012c4ca8718c1f6c589f65c08d778b05a8a2 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 6 May 2026 17:19:08 +0200 Subject: [PATCH] radv: fix an assertion with RADV_DEBUG=fullsync on GFX11+ This can only happen with RADV_DEBUG=fullsync which literally flushes all caches, but INV_ICACHE is invalid with RELEASE_MEM apparently. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_cs.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/vulkan/radv_cs.c b/src/amd/vulkan/radv_cs.c index f0e2cd8fe56..898f2e98125 100644 --- a/src/amd/vulkan/radv_cs.c +++ b/src/amd/vulkan/radv_cs.c @@ -149,7 +149,7 @@ gfx10_cs_emit_cache_flush(struct radv_cmd_stream *cs, enum amd_gfx_level gfx_lev if (cb_db_event) { if (gfx_level >= GFX11) { /* Send an event that flushes caches. */ - ac_emit_cp_release_mem_pws(cs->b, gfx_level, cs->hw_ip, cb_db_event, gcr_cntl); + ac_emit_cp_release_mem_pws(cs->b, gfx_level, cs->hw_ip, cb_db_event, gcr_cntl & C_587_GLI_INV); gcr_cntl &= C_587_GLK_WB & C_587_GLK_INV & C_587_GLV_INV & C_587_GL2_INV & C_587_GL2_WB; /* keep SEQ */