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ir3: fix alignment of spill slots

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Alignment was set in units of half registers instead of bytes causing
spill slots to sometimes be under-aligned.

Fixes: 613eaac ("ir3: Initial support for spilling non-shared registers")
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27411>
This commit is contained in:
Job Noorman 2024-02-29 11:24:00 +01:00 • committed by Marge Bot
parent cef867edc5
commit 4d0445d914
1 changed files with 2 additions and 2 deletions
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4
src/freedreno/ir3/ir3_spill.c
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@ -673,13 +673,13 @@ get_spill_slot(struct ra_spill_ctx *ctx, struct ir3_register *reg)
if (reg->merge_set) {
if (reg->merge_set->spill_slot == ~0) {
reg->merge_set->spill_slot = ALIGN_POT(ctx->spill_slot,
reg->merge_set->alignment);
reg->merge_set->alignment * 2);
ctx->spill_slot = reg->merge_set->spill_slot + reg->merge_set->size * 2;
}
return reg->merge_set->spill_slot + reg->merge_set_offset * 2;
} else {
if (reg->spill_slot == ~0) {
reg->spill_slot = ALIGN_POT(ctx->spill_slot, reg_elem_size(reg));
reg->spill_slot = ALIGN_POT(ctx->spill_slot, reg_elem_size(reg) * 2);
ctx->spill_slot = reg->spill_slot + reg_size(reg) * 2;
}
return reg->spill_slot;