From 4c315bdbfaf6d226b3ad2bca771e5e1e9a7bbd48 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Mon, 28 Apr 2025 14:52:04 +0800 Subject: [PATCH] radeonsi: lower task/mesh shader io to mem MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_shader_nir.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c index 45925168b07..f84af433a4f 100644 --- a/src/gallium/drivers/radeonsi/si_shader_nir.c +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c @@ -335,6 +335,14 @@ static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir) } NIR_PASS(_, nir, nir_lower_gs_intrinsics, flags); + } else if (nir->info.stage == MESA_SHADER_TASK) { + NIR_PASS(_, nir, ac_nir_lower_task_outputs_to_mem, + sscreen->task_info.payload_entry_size, + sscreen->task_info.num_entries, false); + } else if (nir->info.stage == MESA_SHADER_MESH) { + NIR_PASS(_, nir, ac_nir_lower_mesh_inputs_to_mem, + sscreen->task_info.payload_entry_size, + sscreen->task_info.num_entries); } if (mesa_shader_stage_is_compute(nir->info.stage)) {