From 4c220f9745a0698c983598839b84be9e385c9f03 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Wed, 29 Oct 2025 10:44:29 +0800 Subject: [PATCH] radeonsi: add si_emit_rasterizer_prim_state_for_mesh MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To be used by mesh pipeline. Reviewed-by: Marek Olšák Part-of: --- src/gallium/drivers/radeonsi/si_pipe.h | 8 ----- src/gallium/drivers/radeonsi/si_state.h | 1 + .../drivers/radeonsi/si_state_draw.cpp | 32 +++++++++++++++++++ 3 files changed, 33 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 53be45350e5..c9262156a8f 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -2298,14 +2298,6 @@ static inline bool si_vs_uses_vbos(struct si_shader_selector *sel) return !sel || !sel->info.base.vs.blit_sgprs_amd; } -static inline bool si_is_line_stipple_enabled(struct si_context *sctx) -{ - struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; - - return rs->line_stipple_enable && sctx->current_rast_prim != MESA_PRIM_POINTS && - (rs->polygon_mode_is_lines || util_prim_is_lines(sctx->current_rast_prim)); -} - static ALWAYS_INLINE void si_emit_all_states(struct si_context *sctx, uint64_t skip_atom_mask) { diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index d2f96d4f74c..7554ab7c5c5 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -701,6 +701,7 @@ void si_set_vertex_buffer_descriptor(struct si_screen *sscreen, struct si_vertex uint32_t *out); void si_emit_buffered_compute_sh_regs(struct si_context *sctx, struct radeon_cmdbuf *cs); void si_emit_buffered_gfx_sh_regs_for_mesh(struct si_context *sctx); +void si_emit_rasterizer_prim_state_for_mesh(struct si_context *sctx); bool si_update_shaders_for_mesh(struct si_context *sctx, struct si_shader *old_vs, struct si_shader *new_vs); void si_init_draw_functions_GFX6(struct si_context *sctx); void si_init_draw_functions_GFX7(struct si_context *sctx); diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp index ee901bf4a15..091405b3c7f 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.cpp +++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp @@ -895,6 +895,14 @@ static void si_init_ia_multi_vgt_param_table(struct si_context *sctx) } } +static bool si_is_line_stipple_enabled(struct si_context *sctx) +{ + struct si_state_rasterizer *rs = sctx->queued.named.rasterizer; + + return rs->line_stipple_enable && sctx->current_rast_prim != MESA_PRIM_POINTS && + (rs->polygon_mode_is_lines || util_prim_is_lines(sctx->current_rast_prim)); +} + enum si_is_draw_vertex_state { DRAW_VERTEX_STATE_OFF, DRAW_VERTEX_STATE_ON, @@ -1038,6 +1046,30 @@ static void si_emit_rasterizer_prim_state(struct si_context *sctx) radeon_end(); } +#if GFX_VER == 6 /* declare this function only once because it handles all chips. */ + +void si_emit_rasterizer_prim_state_for_mesh(struct si_context *sctx) +{ + switch (sctx->screen->info.gfx_level) { + case GFX10_3: + si_emit_rasterizer_prim_state(sctx); + break; + case GFX11: + si_emit_rasterizer_prim_state(sctx); + break; + case GFX11_5: + si_emit_rasterizer_prim_state(sctx); + break; + case GFX12: + si_emit_rasterizer_prim_state(sctx); + break; + default: + UNREACHABLE("invalid GFX version for mesh shaders"); + } +} + +#endif + template ALWAYS_INLINE static void si_emit_vs_state(struct si_context *sctx, unsigned index_size)