radeonsi: move function prototypes from si_pipe.h to si_gfx.h

Reviewed-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41133>

src/gallium/drivers/radeonsi/gfx/si_blit.c

@@ -5,7 +5,7 @@
  * SPDX-License-Identifier: MIT
  */
 
-#include "gfx/si_gfx.h"
+#include "si_gfx.h"
 #include "si_pipe.h"
 #include "util/format/u_format.h"
 #include "util/u_log.h"

src/gallium/drivers/radeonsi/gfx/si_gfx.h

@@ -9,6 +9,7 @@
 
 #include "util/mesa-blake3.h"
 #include "util/u_stub_gfx_compute.h"
+#include "ac_sqtt.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -19,6 +20,46 @@ struct si_shader;
 struct si_shader_selector;
 struct si_context;
 struct ac_llvm_compiler;
+struct nir_shader;
+struct radeon_cmdbuf;
+struct si_sqtt_fake_pipeline;
+struct pipe_resource;
+struct pipe_blit_info;
+struct si_texture;
+struct pipe_box;
+struct pipe_context;
+
+enum si_blitter_op /* bitmask */
+{
+   SI_SAVE_TEXTURES = 1,
+   SI_SAVE_FRAMEBUFFER = 2,
+   SI_SAVE_FRAGMENT_CONSTANT = 4,
+   SI_DISABLE_RENDER_COND = 8,
+};
+
+/* si_blit.c */
+void si_blitter_begin(struct si_context *sctx, enum si_blitter_op op);
+void si_blitter_end(struct si_context *sctx);
+void si_init_blit_functions(struct si_context *sctx);
+void gfx6_decompress_textures(struct si_context *sctx, unsigned shader_mask);
+void gfx11_decompress_textures(struct si_context *sctx, unsigned shader_mask);
+MESAPROC void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *tex, unsigned planes,
+                                        unsigned level, unsigned first_layer, unsigned last_layer,
+                                        bool need_fmask_expand) TAILV;
+MESAPROC void si_resource_copy_region(struct pipe_context *ctx, struct pipe_resource *dst,
+                                      unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz,
+                                      struct pipe_resource *src, unsigned src_level,
+                                      const struct pipe_box *src_box) TAILV;
+MESAPROC void si_gfx_copy_image(struct si_context *sctx, struct pipe_resource *dst,
+                                unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz,
+                                struct pipe_resource *src, unsigned src_level,
+                                const struct pipe_box *src_box) TAILV;
+MESAPROC void si_decompress_dcc(struct si_context *sctx, struct si_texture *tex) TAILV;
+void si_flush_implicit_resources(struct si_context *sctx);
+MESAPROC void si_gfx_blit(struct pipe_context *ctx, const struct pipe_blit_info *info) TAILV;
+
+/* si_nir_optim.c */
+bool si_nir_is_output_const_if_tex_is_const(struct nir_shader *shader, float *in, float *out, int *texunit);
 
 /* si_gfx_context.c */
 MESAPROC bool si_init_gfx_context(struct si_screen *sscreen, struct si_context *sctx, unsigned flags) TAILB;
@@ -46,6 +87,40 @@ bool si_shader_cache_load_shader(struct si_screen *sscreen, unsigned char ir_bla
 void si_shader_cache_insert_shader(struct si_screen *sscreen, unsigned char ir_blake3_cache_key[BLAKE3_KEY_LEN],
                                    struct si_shader *shader, bool insert_into_disk_cache);
 
+/* si_sqtt.c */
+void si_sqtt_write_event_marker(struct si_context* sctx, struct radeon_cmdbuf *rcs,
+                                enum rgp_sqtt_marker_event_type api_type,
+                                uint32_t vertex_offset_user_data,
+                                uint32_t instance_offset_user_data,
+                                uint32_t draw_index_user_data);
+bool si_sqtt_register_pipeline(struct si_context* sctx, struct si_sqtt_fake_pipeline *pipeline,
+                               uint32_t *gfx_sh_offsets);
+bool si_sqtt_pipeline_is_registered(struct ac_sqtt *sqtt,
+                                    uint64_t pipeline_hash);
+void si_sqtt_describe_pipeline_bind(struct si_context* sctx, uint64_t pipeline_hash, int bind_point);
+void
+si_write_event_with_dims_marker(struct si_context* sctx, struct radeon_cmdbuf *rcs,
+                                enum rgp_sqtt_marker_event_type api_type,
+                                uint32_t x, uint32_t y, uint32_t z);
+void
+si_write_user_event(struct si_context* sctx, struct radeon_cmdbuf *rcs,
+                    enum rgp_sqtt_marker_user_event_type type,
+                    const char *str, int len);
+MESAPROC void
+si_sqtt_describe_barrier_start(struct si_context* sctx, struct radeon_cmdbuf *rcs) TAILV;
+MESAPROC void
+si_sqtt_describe_barrier_end(struct si_context* sctx, struct radeon_cmdbuf *rcs, unsigned flags) TAILV;
+bool si_init_sqtt(struct si_context *sctx);
+void si_destroy_sqtt(struct si_context *sctx);
+MESAPROC void si_handle_sqtt(struct si_context *sctx, struct radeon_cmdbuf *rcs) TAILV;
+
+/* si_mesh_shader.c */
+void si_init_task_mesh_shader_functions(struct si_context *sctx);
+
+/* si_nir_mediump.c */
+void si_nir_lower_mediump_io_default(struct nir_shader *nir);
+void si_nir_lower_mediump_io_option(struct nir_shader *nir);
+
 #ifdef __cplusplus
 }
 #endif

src/gallium/drivers/radeonsi/gfx/si_mesh_shader.c

@@ -7,6 +7,7 @@
 #include "si_pipe.h"
 #include "si_build_pm4.h"
 #include "si_query.h"
+#include "si_gfx.h"
 #include "util/u_upload_mgr.h"
 
 #define SI_MESH_PIPELINE_STATE_DIRTY_MASK \

src/gallium/drivers/radeonsi/gfx/si_nir_mediump.c

@@ -3,7 +3,7 @@
  *
  * SPDX-License-Identifier: MIT
  */
-#include "si_pipe.h"
+#include "si_gfx.h"
 #include "nir.h"
 #include "nir/nir_xfb_info.h"
 

src/gallium/drivers/radeonsi/gfx/si_nir_optim.c

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: MIT
  */
 
-#include "si_pipe.h"
+#include "si_gfx.h"
 #include "nir.h"
 #include "nir_builder.h"
 #include "nir_worklist.h"

src/gallium/drivers/radeonsi/gfx/si_sqtt.c

@@ -4,6 +4,7 @@
  * SPDX-License-Identifier: MIT
  */
 
+#include "si_gfx.h"
 #include "ac_cmdbuf_cp.h"
 #include "ac_shader_util.h"
 #include "amd_family.h"

src/gallium/drivers/radeonsi/mm/radeon_vce.c

@@ -10,7 +10,7 @@
 
 #include "pipe/p_video_codec.h"
 #include "radeon_bitstream.h"
-#include "si_pipe.h"
+#include "gfx/si_gfx.h"
 #include "util/u_memory.h"
 #include "vl/vl_video_buffer.h"
 #include "si_video.h"

src/gallium/drivers/radeonsi/si_barrier.c

@@ -6,6 +6,7 @@
 
 #include "si_build_pm4.h"
 #include "si_query.h"
+#include "gfx/si_gfx.h"
 
 static struct si_resource *si_get_wait_mem_scratch_bo(struct si_context *ctx,
                                                       struct radeon_cmdbuf *cs, bool is_secure)

src/gallium/drivers/radeonsi/si_clear.c

@@ -4,6 +4,7 @@
  * SPDX-License-Identifier: MIT
  */
 
+#include "gfx/si_gfx.h"
 #include "si_pipe.h"
 #include "util/format/u_format.h"
 #include "util/u_pack_color.h"

src/gallium/drivers/radeonsi/si_cp_utils.c

@@ -5,6 +5,7 @@
  */
 
 #include "si_pipe.h"
+#include "gfx/si_gfx.h"
 #include "ac_cmdbuf_cp.h"
 
 void si_cp_release_mem_pws(struct si_context *sctx, struct radeon_cmdbuf *cs,

src/gallium/drivers/radeonsi/si_descriptors.c

@@ -36,6 +36,7 @@
  */
 
 #include "si_pipe.h"
+#include "gfx/si_gfx.h"
 #include "si_build_pm4.h"
 #include "sid.h"
 #include "util/format/u_format.h"

src/gallium/drivers/radeonsi/si_fence.c

@@ -5,6 +5,7 @@
  */
 
 #include "si_pipe.h"
+#include "gfx/si_gfx.h"
 #include "ac_cmdbuf_cp.h"
 #include "util/os_time.h"
 #include "util/u_memory.h"

src/gallium/drivers/radeonsi/si_gfx_cs.c

@@ -5,6 +5,7 @@
  * SPDX-License-Identifier: MIT
  */
 
+#include "gfx/si_gfx.h"
 #include "si_build_pm4.h"
 #include "si_pipe.h"
 #include "sid.h"

src/gallium/drivers/radeonsi/si_pipe.h

@@ -1379,38 +1379,6 @@ void si_barrier_before_image_fast_clear(struct si_context *sctx, unsigned types)
 void si_barrier_after_image_fast_clear(struct si_context *sctx);
 void si_init_barrier_functions(struct si_context *sctx);
 
-/* si_blit.c */
-enum si_blitter_op /* bitmask */
-{
-   SI_SAVE_TEXTURES = 1,
-   SI_SAVE_FRAMEBUFFER = 2,
-   SI_SAVE_FRAGMENT_CONSTANT = 4,
-   SI_DISABLE_RENDER_COND = 8,
-};
-
-void si_blitter_begin(struct si_context *sctx, enum si_blitter_op op);
-void si_blitter_end(struct si_context *sctx);
-void si_init_blit_functions(struct si_context *sctx);
-void gfx6_decompress_textures(struct si_context *sctx, unsigned shader_mask);
-void gfx11_decompress_textures(struct si_context *sctx, unsigned shader_mask);
-MESAPROC void si_decompress_subresource(struct pipe_context *ctx, struct pipe_resource *tex, unsigned planes,
-                                    unsigned level, unsigned first_layer, unsigned last_layer,
-                                    bool need_fmask_expand) TAILV;
-MESAPROC void si_resource_copy_region(struct pipe_context *ctx, struct pipe_resource *dst,
-                                  unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz,
-                                  struct pipe_resource *src, unsigned src_level,
-                                  const struct pipe_box *src_box) TAILV;
-void si_gfx_copy_image(struct si_context *sctx, struct pipe_resource *dst,
-                       unsigned dst_level, unsigned dstx, unsigned dsty, unsigned dstz,
-                       struct pipe_resource *src, unsigned src_level,
-                       const struct pipe_box *src_box);
-MESAPROC void si_decompress_dcc(struct si_context *sctx, struct si_texture *tex) TAILV;
-void si_flush_implicit_resources(struct si_context *sctx);
-MESAPROC void si_gfx_blit(struct pipe_context *ctx, const struct pipe_blit_info *info) TAILV;
-
-/* si_nir_optim.c */
-bool si_nir_is_output_const_if_tex_is_const(struct nir_shader *shader, float *in, float *out, int *texunit);
-
 /* si_buffer.c */
 bool si_cs_is_buffer_referenced(struct si_context *sctx, struct pb_buffer_lean *buf,
                                 unsigned usage);
@@ -1697,40 +1665,6 @@ bool si_texture_disable_dcc(struct si_context *sctx, struct si_texture *tex);
 void si_init_screen_texture_functions(struct si_screen *sscreen);
 void si_init_context_texture_functions(struct si_context *sctx);
 
-/* si_sqtt.c */
-void si_sqtt_write_event_marker(struct si_context* sctx, struct radeon_cmdbuf *rcs,
-                                enum rgp_sqtt_marker_event_type api_type,
-                                uint32_t vertex_offset_user_data,
-                                uint32_t instance_offset_user_data,
-                                uint32_t draw_index_user_data);
-bool si_sqtt_register_pipeline(struct si_context* sctx, struct si_sqtt_fake_pipeline *pipeline,
-                               uint32_t *gfx_sh_offsets);
-bool si_sqtt_pipeline_is_registered(struct ac_sqtt *sqtt,
-                                    uint64_t pipeline_hash);
-void si_sqtt_describe_pipeline_bind(struct si_context* sctx, uint64_t pipeline_hash, int bind_point);
-void
-si_write_event_with_dims_marker(struct si_context* sctx, struct radeon_cmdbuf *rcs,
-                                enum rgp_sqtt_marker_event_type api_type,
-                                uint32_t x, uint32_t y, uint32_t z);
-MESAPROC void
-si_write_user_event(struct si_context* sctx, struct radeon_cmdbuf *rcs,
-                    enum rgp_sqtt_marker_user_event_type type,
-                    const char *str, int len) TAILV;
-MESAPROC void
-si_sqtt_describe_barrier_start(struct si_context* sctx, struct radeon_cmdbuf *rcs) TAILV;
-MESAPROC void
-si_sqtt_describe_barrier_end(struct si_context* sctx, struct radeon_cmdbuf *rcs, unsigned flags) TAILV;
-MESAPROC bool si_init_sqtt(struct si_context *sctx) TAILB;
-MESAPROC void si_destroy_sqtt(struct si_context *sctx) TAILV;
-MESAPROC void si_handle_sqtt(struct si_context *sctx, struct radeon_cmdbuf *rcs) TAILV;
-
-/* si_mesh_shader.c */
-MESAPROC void si_init_task_mesh_shader_functions(struct si_context *sctx) TAILV;
-
-/* si_nir_mediump.c */
-MESAPROC void si_nir_lower_mediump_io_default(nir_shader *nir) TAILV;
-MESAPROC void si_nir_lower_mediump_io_option(nir_shader *nir) TAILV;
-
 /*
  * common helpers
  */

src/gallium/drivers/radeonsi/si_sdma_copy_image.c

@@ -6,6 +6,7 @@
  */
 
 #include "si_pipe.h"
+#include "gfx/si_gfx.h"
 #include "util/u_memory.h"
 #include "ac_cmdbuf_sdma.h"
 

src/gallium/drivers/radeonsi/si_state.c

@@ -6,6 +6,7 @@
 
 #include "si_build_pm4.h"
 #include "si_query.h"
+#include "gfx/si_gfx.h"
 #include "gfx/si_shader_internal.h"
 #include "sid.h"
 #include "util/fast_idiv_by_const.h"

src/gallium/drivers/radeonsi/si_state_draw.cpp

@@ -16,6 +16,7 @@
 #include "ac_rtld.h"
 #include "si_build_pm4.h"
 #include "si_tracepoints.h"
+#include "gfx/si_gfx.h"
 
 #if (GFX_VER == 6)
 #define GFX(name) name##GFX6

src/gallium/drivers/radeonsi/si_test_image_copy_region.c

@@ -7,6 +7,7 @@
 /* This file implements randomized texture blit tests. */
 
 #include "si_pipe.h"
+#include "gfx/si_gfx.h"
 #include "util/rand_xor.h"
 #include "util/u_surface.h"
 #include "amd/addrlib/inc/addrtypes.h"

src/gallium/drivers/radeonsi/si_texture.c

@@ -6,6 +6,7 @@
  */
 
 #include "drm-uapi/drm_fourcc.h"
+#include "gfx/si_gfx.h"
 #include "si_pipe.h"
 #include "si_query.h"
 #include "frontend/drm_driver.h"