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radv/amdgpu: fix alignment of command buffers
Fixes other recent regressions.
Fixes: 4f660f99 ("ac/gpu_info: pad IBs according to ib_size_alignment")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25502>
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98bc20041c
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4bc58c9f11
1 changed files with 5 additions and 5 deletions
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@ -288,9 +288,9 @@ radv_amdgpu_cs_get_new_ib(struct radeon_cmdbuf *_cs, uint32_t ib_size)
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static unsigned
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radv_amdgpu_cs_get_initial_size(struct radv_amdgpu_winsys *ws, enum amd_ip_type ip_type)
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{
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uint32_t ib_pad_dw_mask = MAX2(3, ws->info.ib_pad_dw_mask[ip_type]);
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assert(util_is_power_of_two_nonzero(ib_pad_dw_mask + 1));
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return align(20 * 1024 * 4, ib_pad_dw_mask + 1);
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const uint32_t ib_size_alignment = ws->info.ip[ip_type].ib_size_alignment;
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assert(util_is_power_of_two_nonzero(ib_size_alignment));
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return align(20 * 1024 * 4, ib_size_alignment);
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}
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static struct radeon_cmdbuf *
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@ -379,14 +379,14 @@ radv_amdgpu_cs_grow(struct radeon_cmdbuf *_cs, size_t min_size)
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}
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enum amd_ip_type ip_type = cs->hw_ip;
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uint32_t ib_pad_dw_mask = MAX2(3, cs->ws->info.ib_pad_dw_mask[ip_type]);
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const uint32_t ib_size_alignment = cs->ws->info.ip[ip_type].ib_size_alignment;
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cs->ws->base.cs_finalize(_cs);
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uint64_t ib_size = MAX2(min_size * 4 + 16, cs->base.max_dw * 4 * 2);
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/* max that fits in the chain size field. */
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ib_size = align(MIN2(ib_size, 0xfffff), ib_pad_dw_mask + 1);
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ib_size = align(MIN2(ib_size, 0xfffff), ib_size_alignment);
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VkResult result = radv_amdgpu_cs_bo_create(cs, ib_size);
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