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intel/fs: fix depth compute state for unchanged depth layout

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There is no VK CTS exercising this case. If there was we would run
into hangs as noticed in
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26876

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26923>
This commit is contained in:
Lionel Landwerlin 2024-01-08 12:17:54 +02:00 • committed by Marge Bot
parent 9eac06521a
commit 4b30b46ffd
1 changed files with 11 additions and 1 deletions
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12
src/intel/compiler/brw_fs.cpp
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@ -7415,7 +7415,17 @@ computed_depth_mode(const nir_shader *shader)
case FRAG_DEPTH_LAYOUT_LESS:
return BRW_PSCDEPTH_ON_LE;
case FRAG_DEPTH_LAYOUT_UNCHANGED:
return BRW_PSCDEPTH_OFF;
/* We initially set this to OFF, but having the shader write the
* depth means we allocate register space in the SEND message. The
* difference between the SEND register count and the OFF state
* programming makes the HW hang.
*
* Removing the depth writes also leads to test failures. So use
* LesserThanOrEqual, which fits writing the same value
* (unchanged/equal).
*
*/
return BRW_PSCDEPTH_ON_LE;
}
}
return BRW_PSCDEPTH_OFF;