diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 8f4fa2865de..fc507e34ef0 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2691,6 +2691,7 @@ radv_emit_patch_control_points(struct radv_cmd_buffer *cmd_buffer) unsigned tcs_offchip_layout = SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_PATCH_CONTROL_POINTS, d->vk.ts.patch_control_points - 1) | + SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_OUT_PATCH_CP, tcs->info.tcs.tcs_vertices_out - 1) | SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_NUM_PATCHES, cmd_buffer->state.tess_num_patches - 1) | SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_NUM_LS_OUTPUTS, vs->info.vs.num_linked_outputs) | SET_SGPR_FIELD(TCS_OFFCHIP_LAYOUT_NUM_HS_OUTPUTS, tcs->info.tcs.num_linked_outputs) | diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 1a51e8abde4..c744f028745 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -252,6 +252,8 @@ enum radv_ud_index { #define TCS_OFFCHIP_LAYOUT_NUM_PATCHES__MASK 0x7f #define TCS_OFFCHIP_LAYOUT_PATCH_CONTROL_POINTS__SHIFT 12 #define TCS_OFFCHIP_LAYOUT_PATCH_CONTROL_POINTS__MASK 0x1f +#define TCS_OFFCHIP_LAYOUT_OUT_PATCH_CP__SHIFT 7 +#define TCS_OFFCHIP_LAYOUT_OUT_PATCH_CP__MASK 0x1f #define TCS_OFFCHIP_LAYOUT_NUM_LS_OUTPUTS__SHIFT 17 #define TCS_OFFCHIP_LAYOUT_NUM_LS_OUTPUTS__MASK 0x3f #define TCS_OFFCHIP_LAYOUT_NUM_HS_OUTPUTS__SHIFT 23 diff --git a/src/amd/vulkan/radv_shader_args.h b/src/amd/vulkan/radv_shader_args.h index d2f25fcbb5b..551ffe0b5d0 100644 --- a/src/amd/vulkan/radv_shader_args.h +++ b/src/amd/vulkan/radv_shader_args.h @@ -68,7 +68,7 @@ struct radv_shader_args { /* TCS */ /* # [0:6] = the number of tessellation patches minus one, max = 127 - * # [7:11] = reserved for future use + * # [7:11] = the number of output patch control points minus one, max = 31 * # [12:16] = the number of input patch control points minus one, max = 31 * # [17:22] = the number of LS outputs, up to 32 * # [23:28] = the number of HS per-vertex outputs, up to 32