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radeon/llvm: Add support for more f32 CMP instructions on SI

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This commit is contained in:
Tom Stellard 2012-08-02 14:14:22 -04:00
parent a35eea7868
commit 4a89a20717
1 changed files with 15 additions and 5 deletions
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20
src/gallium/drivers/radeon/SIInstructions.td
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@ -118,14 +118,24 @@ def S_GETREG_REGRD_B32 : SOPK_32 <0x00000014, "S_GETREG_REGRD_B32", []>;
//def EXP : EXP_ <0x00000000, "EXP", []>;
defm V_CMP_F_F32 : VOPC_32 <0x00000000, "V_CMP_F_F32", []>;
defm V_CMP_LT_F32 : VOPC_32 <0x00000001, "V_CMP_LT_F32", []>;
defm V_CMP_LT_F32 : VOPC_32 <0x00000001, "V_CMP_LT_F32",
[(set VCCReg:$dst, (setcc (f32 AllReg_32:$src0), VReg_32:$src1, COND_LT))]
>;
defm V_CMP_EQ_F32 : VOPC_32 <0x00000002, "V_CMP_EQ_F32",
[(set VCCReg:$dst, (setcc (f32 AllReg_32:$src0), VReg_32:$src1, COND_EQ))]
>;
defm V_CMP_LE_F32 : VOPC_32 <0x00000003, "V_CMP_LE_F32", []>;
defm V_CMP_GT_F32 : VOPC_32 <0x00000004, "V_CMP_GT_F32", []>;
defm V_CMP_LG_F32 : VOPC_32 <0x00000005, "V_CMP_LG_F32", []>;
defm V_CMP_GE_F32 : VOPC_32 <0x00000006, "V_CMP_GE_F32", []>;
defm V_CMP_LE_F32 : VOPC_32 <0x00000003, "V_CMP_LE_F32",
[(set VCCReg:$dst, (setcc (f32 AllReg_32:$src0), VReg_32:$src1, COND_LE))]
>;
defm V_CMP_GT_F32 : VOPC_32 <0x00000004, "V_CMP_GT_F32",
[(set VCCReg:$dst, (setcc (f32 AllReg_32:$src0), VReg_32:$src1, COND_GT))]
>;
defm V_CMP_LG_F32 : VOPC_32 <0x00000005, "V_CMP_LG_F32",
[(set VCCReg:$dst, (setcc (f32 AllReg_32:$src0), VReg_32:$src1, COND_NE))]
>;
defm V_CMP_GE_F32 : VOPC_32 <0x00000006, "V_CMP_GE_F32",
[(set VCCReg:$dst, (setcc (f32 AllReg_32:$src0), VReg_32:$src1, COND_GE))]
>;
defm V_CMP_O_F32 : VOPC_32 <0x00000007, "V_CMP_O_F32", []>;
defm V_CMP_U_F32 : VOPC_32 <0x00000008, "V_CMP_U_F32", []>;
defm V_CMP_NGE_F32 : VOPC_32 <0x00000009, "V_CMP_NGE_F32", []>;