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i965: Remove never used RSR and RSL opcodes.

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RSR and RSL are listed in the "Defeatured Instructions" section of the
965 PRM, Volume 4:

"The following instructions are removed from Gen4 implementation mainly
 due to implementation cost/schedule reasons.  They are candidates for
 future generations."

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Matt Turner 2013-08-28 17:03:22 -07:00
parent 0f6fce1585
commit 4a6100054c
4 changed files with 0 additions and 8 deletions
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2
src/mesa/drivers/dri/i965/brw_defines.h
View file

@ -691,8 +691,6 @@ enum opcode {
BRW_OPCODE_XOR = 7,
BRW_OPCODE_SHR = 8,
BRW_OPCODE_SHL = 9,
BRW_OPCODE_RSR = 10,
BRW_OPCODE_RSL = 11,
BRW_OPCODE_ASR = 12,
BRW_OPCODE_CMP = 16,
BRW_OPCODE_CMPN = 17,

2
src/mesa/drivers/dri/i965/brw_eu.h
View file

@ -154,8 +154,6 @@ ALU2(OR)
ALU2(XOR)
ALU2(SHR)
ALU2(SHL)
ALU2(RSR)
ALU2(RSL)
ALU2(ASR)
ALU1(F32TO16)
ALU1(F16TO32)

2
src/mesa/drivers/dri/i965/brw_eu_emit.c
View file

@ -936,8 +936,6 @@ ALU2(OR)
ALU2(XOR)
ALU2(SHR)
ALU2(SHL)
ALU2(RSR)
ALU2(RSL)
ALU2(ASR)
ALU1(F32TO16)
ALU1(F16TO32)

2
src/mesa/drivers/dri/i965/brw_fs_cse.cpp
View file

@ -53,8 +53,6 @@ is_expression(const fs_inst *const inst)
case BRW_OPCODE_XOR:
case BRW_OPCODE_SHR:
case BRW_OPCODE_SHL:
case BRW_OPCODE_RSR:
case BRW_OPCODE_RSL:
case BRW_OPCODE_ASR:
case BRW_OPCODE_ADD:
case BRW_OPCODE_MUL: