radv: make use of has_ls_vgpr_init_bug

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
This commit is contained in:
Samuel Pitoiset 2019-08-23 08:55:53 +02:00
parent fd54fc85aa
commit 49f5ddd3ae
3 changed files with 3 additions and 2 deletions

View file

@ -4366,8 +4366,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
if (shader_count >= 2 || is_ngg)
ac_init_exec_full_mask(&ctx.ac);
if ((ctx.ac.family == CHIP_VEGA10 ||
ctx.ac.family == CHIP_RAVEN) &&
if (options->has_ls_vgpr_init_bug &&
shaders[shader_count - 1]->info.stage == MESA_SHADER_TESS_CTRL)
ac_nir_fixup_ls_hs_input_vgprs(&ctx);

View file

@ -1146,6 +1146,7 @@ shader_variant_compile(struct radv_device *device,
options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR;
options->tess_offchip_block_dw_size = device->tess_offchip_block_dw_size;
options->address32_hi = device->physical_device->rad_info.address32_hi;
options->has_ls_vgpr_init_bug = device->physical_device->rad_info.has_ls_vgpr_init_bug;
if ((stage == MESA_SHADER_GEOMETRY && !options->key.vs_common_out.as_ngg) ||
gs_copy_shader)

View file

@ -125,6 +125,7 @@ struct radv_nir_compiler_options {
bool dump_preoptir;
bool record_llvm_ir;
bool check_ir;
bool has_ls_vgpr_init_bug;
enum radeon_family family;
enum chip_class chip_class;
uint32_t tess_offchip_block_dw_size;