From 49d09360b5c360ba4c14634e95ead39afa5c2511 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Mon, 24 Apr 2023 08:52:28 +0300 Subject: [PATCH] iris: implement state cache invalidate for Wa_16013063087 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: mesa-stable Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: (cherry picked from commit 5e5ca30785a2c5538d04b714baae05db9a0eab32) --- .pick_status.json | 2 +- src/gallium/drivers/iris/iris_state.c | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 7d3477d0039..5b068cec91f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -796,7 +796,7 @@ "description": "iris: implement state cache invalidate for Wa_16013063087", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null }, diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 0d539c82fd6..3717ed0ef54 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -660,6 +660,16 @@ emit_pipeline_select(struct iris_batch *batch, uint32_t pipeline) } else { flags |= PIPE_CONTROL_UNTYPED_DATAPORT_CACHE_FLUSH; } + /* Wa_16013063087 - State Cache Invalidate must be issued prior to + * PIPELINE_SELECT when switching from 3D to Compute. + * + * SW must do this by programming of PIPECONTROL with “CS Stall” followed + * by a PIPECONTROL with State Cache Invalidate bit set. + */ + if (pipeline == GPGPU && + intel_needs_workaround(batch->screen->devinfo, 16013063087)) + flags |= PIPE_CONTROL_STATE_CACHE_INVALIDATE; + iris_emit_pipe_control_flush(batch, "PIPELINE_SELECT flush", flags); #else /* From "BXML » GT » MI » vol1a GPU Overview » [Instruction]