fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 09:38:07 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

radeonsi/vcn: fix decoding bs buffer alignement issue.

Browse source 
reason:
  in some cases, bs buffer size could cause assertion,
  and some bitstreams of certain resolutions could
  not be decoded.

solution:
  to align the bs buffer to 128.

fixes: 4f1646d73f

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22844>
This commit is contained in:
Ruijing Dong 2023-05-03 21:20:51 -04:00 • committed by Marge Bot
parent 6d84b34359
commit 499f332a3a
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/drivers/radeonsi/radeon_vcn_dec.c
View file

@ -3130,7 +3130,7 @@ struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
dec->h264_valid_poc_num[i] = (unsigned) -1;
}
bs_buf_size = width * height / 32;
bs_buf_size = align(width * height / 32, 128);
for (i = 0; i < NUM_BUFFERS; ++i) {
unsigned msg_fb_it_probs_size = FB_BUFFER_OFFSET + FB_BUFFER_SIZE;
if (have_it(dec))