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crocus: Use ELK compiler

Browse source 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
This commit is contained in:
Caio Oliveira 2024-01-24 15:20:00 -08:00 • committed by Marge Bot
parent 0669210ef4
commit 4968d1a925
13 changed files with 409 additions and 409 deletions
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2
src/gallium/drivers/crocus/crocus_batch.c
View file

@ -252,7 +252,7 @@ crocus_init_batch(struct crocus_context *ice,
const unsigned decode_flags = INTEL_BATCH_DECODE_DEFAULT_FLAGS |
(INTEL_DEBUG(DEBUG_COLOR) ? INTEL_BATCH_DECODE_IN_COLOR : 0);
intel_batch_decode_ctx_init_brw(&batch->decoder, &screen->compiler->isa,
intel_batch_decode_ctx_init_elk(&batch->decoder, &screen->compiler->isa,
&screen->devinfo, stderr,
decode_flags, NULL, decode_get_bo,
decode_get_state_size, batch);

5
src/gallium/drivers/crocus/crocus_blorp.c
View file

@ -43,7 +43,7 @@
#include "util/u_upload_mgr.h"
#include "intel/common/intel_l3_config.h"
#include "blorp/blorp_genX_exec.h"
#include "blorp/blorp_genX_exec_elk.h"
#if GFX_VER <= 5
#include "gen4_blorp_exec.h"
@ -444,8 +444,7 @@ genX(crocus_init_blorp)(struct crocus_context *ice)
{
struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
blorp_init(&ice->blorp, ice, &screen->isl_dev, NULL);
ice->blorp.compiler->brw = screen->compiler;
blorp_init_elk(&ice->blorp, ice, &screen->isl_dev, screen->compiler, NULL);
ice->blorp.lookup_shader = crocus_blorp_lookup_shader;
ice->blorp.upload_shader = crocus_blorp_upload_shader;
ice->blorp.exec = crocus_blorp_exec;

2
src/gallium/drivers/crocus/crocus_clear.c
View file

@ -34,7 +34,7 @@
#include "crocus_context.h"
#include "crocus_resource.h"
#include "crocus_screen.h"
#include "intel/compiler/brw_compiler.h"
#include "intel/compiler/elk/elk_compiler.h"
#include "util/format_srgb.h"
static bool

34
src/gallium/drivers/crocus/crocus_context.h
View file

@ -29,7 +29,7 @@
#include "util/u_threaded_context.h"
#include "intel/blorp/blorp.h"
#include "intel/dev/intel_debug.h"
#include "intel/compiler/brw_compiler.h"
#include "intel/compiler/elk/elk_compiler.h"
#include "crocus_batch.h"
#include "crocus_fence.h"
#include "crocus_resource.h"
@ -50,8 +50,8 @@ struct blorp_params;
#define CROCUS_MAX_CLIP_PLANES 8
enum crocus_param_domain {
BRW_PARAM_DOMAIN_BUILTIN = 0,
BRW_PARAM_DOMAIN_IMAGE,
ELK_PARAM_DOMAIN_BUILTIN = 0,
ELK_PARAM_DOMAIN_IMAGE,
};
enum {
@ -59,12 +59,12 @@ enum {
DRI_CONF_BO_REUSE_ALL
};
#define BRW_PARAM(domain, val) (BRW_PARAM_DOMAIN_##domain << 24 | (val))
#define BRW_PARAM_DOMAIN(param) ((uint32_t)(param) >> 24)
#define BRW_PARAM_VALUE(param) ((uint32_t)(param) & 0x00ffffff)
#define BRW_PARAM_IMAGE(idx, offset) BRW_PARAM(IMAGE, ((idx) << 8) | (offset))
#define BRW_PARAM_IMAGE_IDX(value) (BRW_PARAM_VALUE(value) >> 8)
#define BRW_PARAM_IMAGE_OFFSET(value)(BRW_PARAM_VALUE(value) & 0xf)
#define ELK_PARAM(domain, val) (ELK_PARAM_DOMAIN_##domain << 24 | (val))
#define ELK_PARAM_DOMAIN(param) ((uint32_t)(param) >> 24)
#define ELK_PARAM_VALUE(param) ((uint32_t)(param) & 0x00ffffff)
#define ELK_PARAM_IMAGE(idx, offset) ELK_PARAM(IMAGE, ((idx) << 8) | (offset))
#define ELK_PARAM_IMAGE_IDX(value) (ELK_PARAM_VALUE(value) >> 8)
#define ELK_PARAM_IMAGE_OFFSET(value)(ELK_PARAM_VALUE(value) & 0xf)
/**
* Dirty flags. When state changes, we flag some combination of these
@ -364,7 +364,7 @@ struct crocus_binding_table {
* as well as program data and other packets needed by state upload.
*
* There can be several crocus_compiled_shader variants per API-level shader
* (crocus_uncompiled_shader), due to state-based recompiles (brw_*_prog_key).
* (crocus_uncompiled_shader), due to state-based recompiles (elk_*_prog_key).
*/
struct crocus_compiled_shader {
/** Reference to the uploaded assembly. */
@ -374,11 +374,11 @@ struct crocus_compiled_shader {
uint32_t map_size;
/** The program data (owned by the program cache hash table) */
struct brw_stage_prog_data *prog_data;
struct elk_stage_prog_data *prog_data;
uint32_t prog_data_size;
/** A list of system values to be uploaded as uniforms. */
enum brw_param_builtin *system_values;
enum elk_param_builtin *system_values;
unsigned num_system_values;
/** Number of constbufs expected by the shader. */
@ -604,7 +604,7 @@ struct crocus_context {
* Array of aux usages for drawing, altered to account for any
* self-dependencies from resources bound for sampling and rendering.
*/
enum isl_aux_usage draw_aux_usage[BRW_MAX_DRAW_BUFFERS];
enum isl_aux_usage draw_aux_usage[ELK_MAX_DRAW_BUFFERS];
/** Aux usage of the fb's depth buffer (which may or may not exist). */
enum isl_aux_usage hiz_usage;
@ -681,7 +681,7 @@ struct crocus_context {
uint64_t svbi;
} state;
/* BRW_NEW_URB_ALLOCATIONS:
/* ELK_NEW_URB_ALLOCATIONS:
*/
struct {
uint32_t vsize; /* vertex size plus header in urb registers */
@ -773,7 +773,7 @@ void crocus_init_resource_functions(struct pipe_context *ctx);
void crocus_init_perfquery_functions(struct pipe_context *ctx);
bool crocus_update_compiled_shaders(struct crocus_context *ice);
void crocus_update_compiled_compute_shader(struct crocus_context *ice);
void crocus_fill_cs_push_const_buffer(struct brw_cs_prog_data *cs_prog_data,
void crocus_fill_cs_push_const_buffer(struct elk_cs_prog_data *cs_prog_data,
unsigned threads, uint32_t *dst);
@ -911,10 +911,10 @@ struct crocus_compiled_shader *crocus_upload_shader(struct crocus_context *ice,
const void *key,
const void *assembly,
uint32_t asm_size,
struct brw_stage_prog_data *,
struct elk_stage_prog_data *,
uint32_t prog_data_size,
uint32_t *streamout,
enum brw_param_builtin *sysv,
enum elk_param_builtin *sysv,
unsigned num_system_values,
unsigned num_cbufs,
const struct crocus_binding_table *bt);

20
src/gallium/drivers/crocus/crocus_disk_cache.c
View file

@ -55,7 +55,7 @@ crocus_disk_cache_compute_key(struct disk_cache *cache,
* It's essentially random data which we don't want to include in our
* hashing and comparisons. We'll set a proper value on a cache hit.
*/
union brw_any_prog_key prog_key;
union elk_any_prog_key prog_key;
memcpy(&prog_key, orig_prog_key, prog_key_size);
prog_key.base.program_string_id = 0;
@ -87,7 +87,7 @@ crocus_disk_cache_store(struct disk_cache *cache,
return;
gl_shader_stage stage = ish->nir->info.stage;
const struct brw_stage_prog_data *prog_data = shader->prog_data;
const struct elk_stage_prog_data *prog_data = shader->prog_data;
cache_key cache_key;
crocus_disk_cache_compute_key(cache, ish, prog_key, prog_key_size, cache_key);
@ -110,11 +110,11 @@ crocus_disk_cache_store(struct disk_cache *cache,
* 5. Legacy param array (only used for compute workgroup ID)
* 6. Binding table
*/
blob_write_bytes(&blob, shader->prog_data, brw_prog_data_size(stage));
blob_write_bytes(&blob, shader->prog_data, elk_prog_data_size(stage));
blob_write_bytes(&blob, map + shader->offset, shader->prog_data->program_size);
blob_write_bytes(&blob, &shader->num_system_values, sizeof(unsigned));
blob_write_bytes(&blob, shader->system_values,
shader->num_system_values * sizeof(enum brw_param_builtin));
shader->num_system_values * sizeof(enum elk_param_builtin));
blob_write_bytes(&blob, prog_data->param,
prog_data->nr_params * sizeof(uint32_t));
blob_write_bytes(&blob, &shader->bt, sizeof(shader->bt));
@ -160,9 +160,9 @@ crocus_disk_cache_retrieve(struct crocus_context *ice,
if (!buffer)
return NULL;
const uint32_t prog_data_size = brw_prog_data_size(stage);
const uint32_t prog_data_size = elk_prog_data_size(stage);
struct brw_stage_prog_data *prog_data = ralloc_size(NULL, prog_data_size);
struct elk_stage_prog_data *prog_data = ralloc_size(NULL, prog_data_size);
const void *assembly;
uint32_t num_system_values;
uint32_t *system_values = NULL;
@ -175,9 +175,9 @@ crocus_disk_cache_retrieve(struct crocus_context *ice,
num_system_values = blob_read_uint32(&blob);
if (num_system_values) {
system_values =
ralloc_array(NULL, enum brw_param_builtin, num_system_values);
ralloc_array(NULL, enum elk_param_builtin, num_system_values);
blob_copy_bytes(&blob, system_values,
num_system_values * sizeof(enum brw_param_builtin));
num_system_values * sizeof(enum elk_param_builtin));
}
prog_data->param = NULL;
@ -193,7 +193,7 @@ crocus_disk_cache_retrieve(struct crocus_context *ice,
if ((stage == MESA_SHADER_VERTEX ||
stage == MESA_SHADER_TESS_EVAL ||
stage == MESA_SHADER_GEOMETRY) && screen->devinfo.ver > 6) {
struct brw_vue_prog_data *vue_prog_data = (void *) prog_data;
struct elk_vue_prog_data *vue_prog_data = (void *) prog_data;
so_decls = screen->vtbl.create_so_decl_list(&ish->stream_output,
&vue_prog_data->vue_map);
}
@ -254,7 +254,7 @@ crocus_disk_cache_init(struct crocus_screen *screen)
_mesa_sha1_format(timestamp, id_sha1);
const uint64_t driver_flags =
brw_get_compiler_config_value(screen->compiler);
elk_get_compiler_config_value(screen->compiler);
screen->disk_cache = disk_cache_create(renderer, timestamp, driver_flags);
#endif
}

6
src/gallium/drivers/crocus/crocus_draw.c
View file

@ -36,8 +36,8 @@
#include "util/u_inlines.h"
#include "util/u_transfer.h"
#include "util/u_upload_mgr.h"
#include "intel/compiler/brw_compiler.h"
#include "intel/compiler/brw_eu_defines.h"
#include "intel/compiler/elk/elk_compiler.h"
#include "intel/compiler/elk/elk_eu_defines.h"
#include "compiler/shader_info.h"
#include "crocus_context.h"
#include "crocus_defines.h"
@ -421,7 +421,7 @@ crocus_draw_vbo(struct pipe_context *ctx,
return;
if (ice->state.dirty & CROCUS_DIRTY_RENDER_RESOLVES_AND_FLUSHES) {
bool draw_aux_buffer_disabled[BRW_MAX_DRAW_BUFFERS] = { };
bool draw_aux_buffer_disabled[ELK_MAX_DRAW_BUFFERS] = { };
for (gl_shader_stage stage = 0; stage < MESA_SHADER_COMPUTE; stage++) {
if (ice->shaders.prog[stage])
crocus_predraw_resolve_inputs(ice, batch, draw_aux_buffer_disabled,

383
src/gallium/drivers/crocus/crocus_program.c
View file

File diff suppressed because it is too large Load diff

18
src/gallium/drivers/crocus/crocus_program_cache.c
View file

@ -38,9 +38,9 @@
#include "util/u_upload_mgr.h"
#include "compiler/nir/nir.h"
#include "compiler/nir/nir_builder.h"
#include "intel/compiler/brw_compiler.h"
#include "intel/compiler/brw_disasm.h"
#include "intel/compiler/brw_nir.h"
#include "intel/compiler/elk/elk_compiler.h"
#include "intel/compiler/elk/elk_disasm.h"
#include "intel/compiler/elk/elk_nir.h"
#include "crocus_context.h"
#include "crocus_resource.h"
@ -102,7 +102,7 @@ crocus_find_previous_compile(const struct crocus_context *ice,
{
hash_table_foreach(ice->shaders.cache, entry) {
const struct keybox *keybox = entry->key;
const struct brw_base_prog_key *key = (const void *)keybox->data;
const struct elk_base_prog_key *key = (const void *)keybox->data;
if (keybox->cache_id == cache_id &&
key->program_string_id == program_string_id) {
return keybox->data;
@ -187,9 +187,9 @@ struct crocus_compiled_shader *
crocus_upload_shader(struct crocus_context *ice,
enum crocus_program_cache_id cache_id, uint32_t key_size,
const void *key, const void *assembly, uint32_t asm_size,
struct brw_stage_prog_data *prog_data,
struct elk_stage_prog_data *prog_data,
uint32_t prog_data_size, uint32_t *streamout,
enum brw_param_builtin *system_values,
enum elk_param_builtin *system_values,
unsigned num_system_values, unsigned num_cbufs,
const struct crocus_binding_table *bt)
{
@ -265,7 +265,7 @@ crocus_blorp_upload_shader(struct blorp_batch *blorp_batch, uint32_t stage,
struct blorp_context *blorp = blorp_batch->blorp;
struct crocus_context *ice = blorp->driver_ctx;
struct brw_stage_prog_data *prog_data = ralloc_size(NULL, prog_data_size);
struct elk_stage_prog_data *prog_data = ralloc_size(NULL, prog_data_size);
memcpy(prog_data, prog_data_templ, prog_data_size);
struct crocus_binding_table bt;
@ -334,13 +334,13 @@ void
crocus_print_program_cache(struct crocus_context *ice)
{
struct crocus_screen *screen = (struct crocus_screen *)ice->ctx.screen;
const struct brw_isa_info *isa = &screen->compiler->isa;
const struct elk_isa_info *isa = &screen->compiler->isa;
hash_table_foreach(ice->shaders.cache, entry) {
const struct keybox *keybox = entry->key;
struct crocus_compiled_shader *shader = entry->data;
fprintf(stderr, "%s:\n", cache_name(keybox->cache_id));
brw_disassemble(isa, ice->shaders.cache_bo_map + shader->offset, 0,
elk_disassemble(isa, ice->shaders.cache_bo_map + shader->offset, 0,
shader->prog_data->program_size, NULL, stderr);
}
}

16
src/gallium/drivers/crocus/crocus_screen.c
View file

@ -51,7 +51,7 @@
#include "crocus_pipe.h"
#include "crocus_resource.h"
#include "crocus_screen.h"
#include "intel/compiler/brw_compiler.h"
#include "intel/compiler/elk/elk_compiler.h"
#include "intel/common/intel_gem.h"
#include "intel/common/intel_l3_config.h"
#include "intel/common/intel_uuid.h"
@ -242,12 +242,12 @@ crocus_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CLEAR_SCISSORED:
return devinfo->ver >= 6;
case PIPE_CAP_FBFETCH:
return devinfo->verx10 >= 45 ? BRW_MAX_DRAW_BUFFERS : 0;
return devinfo->verx10 >= 45 ? ELK_MAX_DRAW_BUFFERS : 0;
case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
/* in theory CL (965gm) can do this */
return devinfo->verx10 >= 45 ? 1 : 0;
case PIPE_CAP_MAX_RENDER_TARGETS:
return BRW_MAX_DRAW_BUFFERS;
return ELK_MAX_DRAW_BUFFERS;
case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
if (devinfo->ver >= 7)
return 16384;
@ -265,9 +265,9 @@ crocus_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
return devinfo->ver >= 7 ? 2048 : 512;
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
return BRW_MAX_SOL_BINDINGS / CROCUS_MAX_SOL_BUFFERS;
return ELK_MAX_SOL_BINDINGS / CROCUS_MAX_SOL_BUFFERS;
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
return BRW_MAX_SOL_BINDINGS;
return ELK_MAX_SOL_BINDINGS;
case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
case PIPE_CAP_GLSL_FEATURE_LEVEL: {
if (devinfo->verx10 >= 75)
@ -496,7 +496,7 @@ crocus_get_shader_param(struct pipe_screen *pscreen,
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
/* Lie about these to avoid st/mesa's GLSL IR lowering of indirects,
* which we don't want. Our compiler backend will check brw_compiler's
* which we don't want. Our compiler backend will check elk_compiler's
* options and call nir_lower_indirect_derefs appropriately anyway.
*/
return true;
@ -585,7 +585,7 @@ crocus_get_compute_param(struct pipe_screen *pscreen,
RET((uint32_t []) { 1 });
case PIPE_COMPUTE_CAP_SUBGROUP_SIZES:
RET((uint32_t []) { BRW_SUBGROUP_SIZE });
RET((uint32_t []) { ELK_SUBGROUP_SIZE });
case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
RET((uint64_t []) { max_invocations });
@ -779,7 +779,7 @@ crocus_screen_create(int fd, const struct pipe_screen_config *config)
isl_device_init(&screen->isl_dev, &screen->devinfo);
screen->compiler = brw_compiler_create(screen, &screen->devinfo);
screen->compiler = elk_compiler_create(screen, &screen->devinfo);
screen->compiler->shader_debug_log = crocus_shader_debug_log;
screen->compiler->shader_perf_log = crocus_shader_perf_log;
screen->compiler->supports_shader_constants = false;

26
src/gallium/drivers/crocus/crocus_screen.h
View file

@ -38,12 +38,12 @@ struct crocus_resource;
struct crocus_context;
struct crocus_sampler_state;
struct intel_vue_map;
struct brw_tcs_prog_key;
struct brw_tes_prog_key;
struct brw_cs_prog_key;
struct brw_wm_prog_key;
struct brw_vs_prog_key;
struct brw_gs_prog_key;
struct elk_tcs_prog_key;
struct elk_tes_prog_key;
struct elk_cs_prog_key;
struct elk_wm_prog_key;
struct elk_vs_prog_key;
struct elk_gs_prog_key;
struct shader_info;
#define READ_ONCE(x) (*(volatile __typeof__(x) *)&(x))
@ -119,22 +119,22 @@ struct crocus_vtable {
void (*populate_vs_key)(const struct crocus_context *ice,
const struct shader_info *info,
gl_shader_stage last_stage,
struct brw_vs_prog_key *key);
struct elk_vs_prog_key *key);
void (*populate_tcs_key)(const struct crocus_context *ice,
struct brw_tcs_prog_key *key);
struct elk_tcs_prog_key *key);
void (*populate_tes_key)(const struct crocus_context *ice,
const struct shader_info *info,
gl_shader_stage last_stage,
struct brw_tes_prog_key *key);
struct elk_tes_prog_key *key);
void (*populate_gs_key)(const struct crocus_context *ice,
const struct shader_info *info,
gl_shader_stage last_stage,
struct brw_gs_prog_key *key);
struct elk_gs_prog_key *key);
void (*populate_fs_key)(const struct crocus_context *ice,
const struct shader_info *info,
struct brw_wm_prog_key *key);
struct elk_wm_prog_key *key);
void (*populate_cs_key)(const struct crocus_context *ice,
struct brw_cs_prog_key *key);
struct elk_cs_prog_key *key);
void (*fill_clamp_mask)(const struct crocus_sampler_state *state,
int s,
uint32_t *clamp_mask);
@ -208,7 +208,7 @@ struct crocus_screen {
struct intel_device_info devinfo;
struct isl_device isl_dev;
struct crocus_bufmgr *bufmgr;
struct brw_compiler *compiler;
struct elk_compiler *compiler;
struct intel_perf_config *perf_cfg;
const struct intel_l3_config *l3_config_3d;

278
src/gallium/drivers/crocus/crocus_state.c
View file

@ -84,7 +84,7 @@
#include "drm-uapi/i915_drm.h"
#include "intel/common/intel_l3_config.h"
#include "intel/common/intel_sample_positions.h"
#include "intel/compiler/brw_compiler.h"
#include "intel/compiler/elk/elk_compiler.h"
#include "compiler/shader_info.h"
#include "pipe/p_context.h"
#include "pipe/p_defines.h"
@ -108,7 +108,7 @@
#include "crocus_resource.h"
#include "crocus_genx_macros.h"
#include "intel/common/intel_genX_state.h"
#include "intel/common/intel_genX_state_elk.h"
#include "intel/common/intel_guardband.h"
#include "main/macros.h" /* UNCLAMPED_* */
@ -320,7 +320,7 @@ translate_wrap(unsigned pipe_wrap, bool either_nearest)
}
/**
* Equiv if brw_state_batch
* Equiv if elk_state_batch
*/
static uint32_t *
stream_state(struct crocus_batch *batch,
@ -830,7 +830,7 @@ calculate_curbe_offsets(struct crocus_batch *batch)
nr_fp_regs = 0;
for (int i = 0; i < 4; i++) {
const struct brw_ubo_range *range = &ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data->ubo_ranges[i];
const struct elk_ubo_range *range = &ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data->ubo_ranges[i];
if (range->length == 0)
continue;
@ -845,7 +845,7 @@ calculate_curbe_offsets(struct crocus_batch *batch)
nr_vp_regs = 0;
for (int i = 0; i < 4; i++) {
const struct brw_ubo_range *range = &ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data->ubo_ranges[i];
const struct elk_ubo_range *range = &ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data->ubo_ranges[i];
if (range->length == 0)
continue;
@ -864,9 +864,9 @@ calculate_curbe_offsets(struct crocus_batch *batch)
* registers, or 1024 floats). See CS_URB_STATE in the gen4 or gen5
* (volume 1, part 1) PRMs.
*
* Note that in brw_fs.cpp we're only loading up to 16 EU registers of
* Note that in elk_fs.cpp we're only loading up to 16 EU registers of
* values as push constants before spilling to pull constants, and in
* brw_vec4.cpp we're loading up to 32 registers of push constants. An EU
* elk_vec4.cpp we're loading up to 32 registers of push constants. An EU
* register is 1/2 of one of these URB entry units, so that leaves us 16 EU
* regs for clip.
*/
@ -913,13 +913,13 @@ upload_shader_consts(struct crocus_context *ice,
unsigned start)
{
struct crocus_compiled_shader *shader = ice->shaders.prog[stage];
struct brw_stage_prog_data *prog_data = (void *) shader->prog_data;
struct elk_stage_prog_data *prog_data = (void *) shader->prog_data;
uint32_t *cmap;
bool found = false;
unsigned offset = start * 16;
int total = 0;
for (int i = 0; i < 4; i++) {
const struct brw_ubo_range *range = &prog_data->ubo_ranges[i];
const struct elk_ubo_range *range = &prog_data->ubo_ranges[i];
if (range->length == 0)
continue;
@ -1546,7 +1546,7 @@ set_blend_entry_bits(struct crocus_batch *batch, BLEND_ENTRY_GENXML *entry,
} else if (blend_enabled) {
if (idx == 0) {
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_FRAGMENT];
struct brw_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
struct elk_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
entry->ColorBufferBlendEnable =
(!cso_blend->dual_color_blending || wm_prog_data->dual_src_blend);
} else
@ -1565,7 +1565,7 @@ set_blend_entry_bits(struct crocus_batch *batch, BLEND_ENTRY_GENXML *entry,
* when a dual src blend shader is in use. Setup dummy blending.
*/
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_FRAGMENT];
struct brw_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
struct elk_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
if (idx == 0 && !blend_enabled && wm_prog_data->dual_src_blend) {
entry->ColorBufferBlendEnable = 1;
entry->ColorBlendFunction = PIPE_BLEND_ADD;
@ -1592,7 +1592,7 @@ crocus_create_blend_state(struct pipe_context *ctx,
cso->blend_enables = 0;
cso->color_write_enables = 0;
STATIC_ASSERT(BRW_MAX_DRAW_BUFFERS <= 8);
STATIC_ASSERT(ELK_MAX_DRAW_BUFFERS <= 8);
cso->cso = *state;
cso->dual_color_blending = util_blend_state_is_dual(state, 0);
@ -1600,7 +1600,7 @@ crocus_create_blend_state(struct pipe_context *ctx,
#if GFX_VER == 8
bool indep_alpha_blend = false;
#endif
for (int i = 0; i < BRW_MAX_DRAW_BUFFERS; i++) {
for (int i = 0; i < ELK_MAX_DRAW_BUFFERS; i++) {
const struct pipe_rt_blend_state *rt =
&state->rt[state->independent_blend_enable ? i : 0];
if (rt->blend_enable)
@ -1694,7 +1694,7 @@ has_writeable_rt(const struct crocus_blend_state *cso_blend,
unsigned rt_outputs = fs_info->outputs_written >> FRAG_RESULT_DATA0;
if (fs_info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_COLOR))
rt_outputs = (1 << BRW_MAX_DRAW_BUFFERS) - 1;
rt_outputs = (1 << ELK_MAX_DRAW_BUFFERS) - 1;
return cso_blend->color_write_enables & rt_outputs;
}
@ -1794,7 +1794,7 @@ want_pma_fix(struct crocus_context *ice)
{
UNUSED struct crocus_screen *screen = (void *) ice->ctx.screen;
UNUSED const struct intel_device_info *devinfo = &screen->devinfo;
const struct brw_wm_prog_data *wm_prog_data = (void *)
const struct elk_wm_prog_data *wm_prog_data = (void *)
ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data;
const struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
const struct crocus_depth_stencil_alpha_state *cso_zsa = ice->state.cso_zsa;
@ -3012,7 +3012,7 @@ fill_default_image_param(struct isl_image_param *param)
{
memset(param, 0, sizeof(*param));
/* Set the swizzling shifts to all-ones to effectively disable swizzling --
* See emit_address_calculation() in brw_fs_surface_builder.cpp for a more
* See emit_address_calculation() in elk_fs_surface_builder.cpp for a more
* detailed explanation of these parameters.
*/
param->swizzling[0] = 0xff;
@ -3547,23 +3547,23 @@ upload_sysvals(struct crocus_context *ice,
uint32_t sysval = shader->system_values[i];
uint32_t value = 0;
if (BRW_PARAM_DOMAIN(sysval) == BRW_PARAM_DOMAIN_IMAGE) {
if (ELK_PARAM_DOMAIN(sysval) == ELK_PARAM_DOMAIN_IMAGE) {
#if GFX_VER >= 7
unsigned img = BRW_PARAM_IMAGE_IDX(sysval);
unsigned offset = BRW_PARAM_IMAGE_OFFSET(sysval);
unsigned img = ELK_PARAM_IMAGE_IDX(sysval);
unsigned offset = ELK_PARAM_IMAGE_OFFSET(sysval);
struct isl_image_param *param =
&genx->shaders[stage].image_param[img];
assert(offset < sizeof(struct isl_image_param));
value = ((uint32_t *) param)[offset];
#endif
} else if (sysval == BRW_PARAM_BUILTIN_ZERO) {
} else if (sysval == ELK_PARAM_BUILTIN_ZERO) {
value = 0;
} else if (BRW_PARAM_BUILTIN_IS_CLIP_PLANE(sysval)) {
int plane = BRW_PARAM_BUILTIN_CLIP_PLANE_IDX(sysval);
int comp = BRW_PARAM_BUILTIN_CLIP_PLANE_COMP(sysval);
} else if (ELK_PARAM_BUILTIN_IS_CLIP_PLANE(sysval)) {
int plane = ELK_PARAM_BUILTIN_CLIP_PLANE_IDX(sysval);
int comp = ELK_PARAM_BUILTIN_CLIP_PLANE_COMP(sysval);
value = fui(ice->state.clip_planes.ucp[plane][comp]);
} else if (sysval == BRW_PARAM_BUILTIN_PATCH_VERTICES_IN) {
} else if (sysval == ELK_PARAM_BUILTIN_PATCH_VERTICES_IN) {
if (stage == MESA_SHADER_TESS_CTRL) {
value = ice->state.vertices_per_patch;
} else {
@ -3575,17 +3575,17 @@ upload_sysvals(struct crocus_context *ice,
else
value = ice->state.vertices_per_patch;
}
} else if (sysval >= BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X &&
sysval <= BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_W) {
unsigned i = sysval - BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X;
} else if (sysval >= ELK_PARAM_BUILTIN_TESS_LEVEL_OUTER_X &&
sysval <= ELK_PARAM_BUILTIN_TESS_LEVEL_OUTER_W) {
unsigned i = sysval - ELK_PARAM_BUILTIN_TESS_LEVEL_OUTER_X;
value = fui(ice->state.default_outer_level[i]);
} else if (sysval == BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X) {
} else if (sysval == ELK_PARAM_BUILTIN_TESS_LEVEL_INNER_X) {
value = fui(ice->state.default_inner_level[0]);
} else if (sysval == BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_Y) {
} else if (sysval == ELK_PARAM_BUILTIN_TESS_LEVEL_INNER_Y) {
value = fui(ice->state.default_inner_level[1]);
} else if (sysval >= BRW_PARAM_BUILTIN_WORK_GROUP_SIZE_X &&
sysval <= BRW_PARAM_BUILTIN_WORK_GROUP_SIZE_Z) {
unsigned i = sysval - BRW_PARAM_BUILTIN_WORK_GROUP_SIZE_X;
} else if (sysval >= ELK_PARAM_BUILTIN_WORK_GROUP_SIZE_X &&
sysval <= ELK_PARAM_BUILTIN_WORK_GROUP_SIZE_Z) {
unsigned i = sysval - ELK_PARAM_BUILTIN_WORK_GROUP_SIZE_X;
value = ice->state.last_block[i];
} else {
assert(!"unhandled system value");
@ -3693,37 +3693,37 @@ static uint8_t get_wa_flags(enum isl_format format)
switch (format) {
case ISL_FORMAT_R10G10B10A2_USCALED:
wa_flags = BRW_ATTRIB_WA_SCALE;
wa_flags = ELK_ATTRIB_WA_SCALE;
break;
case ISL_FORMAT_R10G10B10A2_SSCALED:
wa_flags = BRW_ATTRIB_WA_SIGN | BRW_ATTRIB_WA_SCALE;
wa_flags = ELK_ATTRIB_WA_SIGN | ELK_ATTRIB_WA_SCALE;
break;
case ISL_FORMAT_R10G10B10A2_UNORM:
wa_flags = BRW_ATTRIB_WA_NORMALIZE;
wa_flags = ELK_ATTRIB_WA_NORMALIZE;
break;
case ISL_FORMAT_R10G10B10A2_SNORM:
wa_flags = BRW_ATTRIB_WA_SIGN | BRW_ATTRIB_WA_NORMALIZE;
wa_flags = ELK_ATTRIB_WA_SIGN | ELK_ATTRIB_WA_NORMALIZE;
break;
case ISL_FORMAT_R10G10B10A2_SINT:
wa_flags = BRW_ATTRIB_WA_SIGN;
wa_flags = ELK_ATTRIB_WA_SIGN;
break;
case ISL_FORMAT_B10G10R10A2_USCALED:
wa_flags = BRW_ATTRIB_WA_SCALE | BRW_ATTRIB_WA_BGRA;
wa_flags = ELK_ATTRIB_WA_SCALE | ELK_ATTRIB_WA_BGRA;
break;
case ISL_FORMAT_B10G10R10A2_SSCALED:
wa_flags = BRW_ATTRIB_WA_SIGN | BRW_ATTRIB_WA_SCALE | BRW_ATTRIB_WA_BGRA;
wa_flags = ELK_ATTRIB_WA_SIGN | ELK_ATTRIB_WA_SCALE | ELK_ATTRIB_WA_BGRA;
break;
case ISL_FORMAT_B10G10R10A2_UNORM:
wa_flags = BRW_ATTRIB_WA_NORMALIZE | BRW_ATTRIB_WA_BGRA;
wa_flags = ELK_ATTRIB_WA_NORMALIZE | ELK_ATTRIB_WA_BGRA;
break;
case ISL_FORMAT_B10G10R10A2_SNORM:
wa_flags = BRW_ATTRIB_WA_SIGN | BRW_ATTRIB_WA_NORMALIZE | BRW_ATTRIB_WA_BGRA;
wa_flags = ELK_ATTRIB_WA_SIGN | ELK_ATTRIB_WA_NORMALIZE | ELK_ATTRIB_WA_BGRA;
break;
case ISL_FORMAT_B10G10R10A2_SINT:
wa_flags = BRW_ATTRIB_WA_SIGN | BRW_ATTRIB_WA_BGRA;
wa_flags = ELK_ATTRIB_WA_SIGN | ELK_ATTRIB_WA_BGRA;
break;
case ISL_FORMAT_B10G10R10A2_UINT:
wa_flags = BRW_ATTRIB_WA_BGRA;
wa_flags = ELK_ATTRIB_WA_BGRA;
break;
default:
break;
@ -4436,11 +4436,11 @@ crocus_is_drawing_points(const struct crocus_context *ice)
return true;
if (ice->shaders.prog[MESA_SHADER_GEOMETRY]) {
const struct brw_gs_prog_data *gs_prog_data =
const struct elk_gs_prog_data *gs_prog_data =
(void *) ice->shaders.prog[MESA_SHADER_GEOMETRY]->prog_data;
return gs_prog_data->output_topology == _3DPRIM_POINTLIST;
} else if (ice->shaders.prog[MESA_SHADER_TESS_EVAL]) {
const struct brw_tes_prog_data *tes_data =
const struct elk_tes_prog_data *tes_data =
(void *) ice->shaders.prog[MESA_SHADER_TESS_EVAL]->prog_data;
return tes_data->output_topology == INTEL_TESS_OUTPUT_TOPOLOGY_POINT;
} else {
@ -4552,7 +4552,7 @@ calculate_attr_overrides(
uint32_t *urb_entry_read_length,
uint32_t *urb_entry_read_offset)
{
const struct brw_wm_prog_data *wm_prog_data = (void *)
const struct elk_wm_prog_data *wm_prog_data = (void *)
ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data;
const struct intel_vue_map *vue_map = ice->shaders.last_vue_map;
const struct crocus_rasterizer_state *cso_rast = ice->state.cso_rast;
@ -4561,7 +4561,7 @@ calculate_attr_overrides(
crocus_get_shader_info(ice, MESA_SHADER_FRAGMENT);
int first_slot =
brw_compute_first_urb_slot_required(fs_info->inputs_read, vue_map);
elk_compute_first_urb_slot_required(fs_info->inputs_read, vue_map);
/* Each URB offset packs two varying slots */
assert(first_slot % 2 == 0);
@ -4629,7 +4629,7 @@ static void
crocus_emit_sbe(struct crocus_batch *batch, const struct crocus_context *ice)
{
const struct crocus_rasterizer_state *cso_rast = ice->state.cso_rast;
const struct brw_wm_prog_data *wm_prog_data = (void *)
const struct elk_wm_prog_data *wm_prog_data = (void *)
ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data;
#if GFX_VER >= 8
struct GENX(SF_OUTPUT_ATTRIBUTE_DETAIL) attr_overrides[16] = { { 0 } };
@ -4678,7 +4678,7 @@ static void
crocus_populate_vs_key(const struct crocus_context *ice,
const struct shader_info *info,
gl_shader_stage last_stage,
struct brw_vs_prog_key *key)
struct elk_vs_prog_key *key)
{
const struct crocus_rasterizer_state *cso_rast = ice->state.cso_rast;
@ -4715,7 +4715,7 @@ crocus_populate_vs_key(const struct crocus_context *ice,
*/
static void
crocus_populate_tcs_key(const struct crocus_context *ice,
struct brw_tcs_prog_key *key)
struct elk_tcs_prog_key *key)
{
}
@ -4726,7 +4726,7 @@ static void
crocus_populate_tes_key(const struct crocus_context *ice,
const struct shader_info *info,
gl_shader_stage last_stage,
struct brw_tes_prog_key *key)
struct elk_tes_prog_key *key)
{
const struct crocus_rasterizer_state *cso_rast = ice->state.cso_rast;
@ -4747,7 +4747,7 @@ static void
crocus_populate_gs_key(const struct crocus_context *ice,
const struct shader_info *info,
gl_shader_stage last_stage,
struct brw_gs_prog_key *key)
struct elk_gs_prog_key *key)
{
const struct crocus_rasterizer_state *cso_rast = ice->state.cso_rast;
@ -4767,7 +4767,7 @@ crocus_populate_gs_key(const struct crocus_context *ice,
static void
crocus_populate_fs_key(const struct crocus_context *ice,
const struct shader_info *info,
struct brw_wm_prog_key *key)
struct elk_wm_prog_key *key)
{
struct crocus_screen *screen = (void *) ice->ctx.screen;
const struct pipe_framebuffer_state *fb = &ice->state.framebuffer;
@ -4779,44 +4779,44 @@ crocus_populate_fs_key(const struct crocus_context *ice,
uint32_t lookup = 0;
if (info->fs.uses_discard || zsa->cso.alpha_enabled)
lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
lookup |= ELK_WM_IZ_PS_KILL_ALPHATEST_BIT;
if (info->outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
lookup |= ELK_WM_IZ_PS_COMPUTES_DEPTH_BIT;
if (fb->zsbuf && zsa->cso.depth_enabled) {
lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
lookup |= ELK_WM_IZ_DEPTH_TEST_ENABLE_BIT;
if (zsa->cso.depth_writemask)
lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
lookup |= ELK_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
}
if (zsa->cso.stencil[0].enabled || zsa->cso.stencil[1].enabled) {
lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
lookup |= ELK_WM_IZ_STENCIL_TEST_ENABLE_BIT;
if (zsa->cso.stencil[0].writemask || zsa->cso.stencil[1].writemask)
lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
lookup |= ELK_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
}
key->iz_lookup = lookup;
key->stats_wm = ice->state.stats_wm;
#endif
uint32_t line_aa = BRW_NEVER;
uint32_t line_aa = ELK_NEVER;
if (rast->cso.line_smooth) {
int reduced_prim = ice->state.reduced_prim_mode;
if (reduced_prim == MESA_PRIM_LINES)
line_aa = BRW_ALWAYS;
line_aa = ELK_ALWAYS;
else if (reduced_prim == MESA_PRIM_TRIANGLES) {
if (rast->cso.fill_front == PIPE_POLYGON_MODE_LINE) {
line_aa = BRW_SOMETIMES;
line_aa = ELK_SOMETIMES;
if (rast->cso.fill_back == PIPE_POLYGON_MODE_LINE ||
rast->cso.cull_face == PIPE_FACE_BACK)
line_aa = BRW_ALWAYS;
line_aa = ELK_ALWAYS;
} else if (rast->cso.fill_back == PIPE_POLYGON_MODE_LINE) {
line_aa = BRW_SOMETIMES;
line_aa = ELK_SOMETIMES;
if (rast->cso.cull_face == PIPE_FACE_FRONT)
line_aa = BRW_ALWAYS;
line_aa = ELK_ALWAYS;
}
}
}
@ -4827,7 +4827,7 @@ crocus_populate_fs_key(const struct crocus_context *ice,
key->clamp_fragment_color = rast->cso.clamp_fragment_color;
key->alpha_to_coverage = blend->cso.alpha_to_coverage ?
BRW_ALWAYS : BRW_NEVER;
ELK_ALWAYS : ELK_NEVER;
key->alpha_test_replicate_alpha = fb->nr_cbufs > 1 && zsa->cso.alpha_enabled;
@ -4835,9 +4835,9 @@ crocus_populate_fs_key(const struct crocus_context *ice,
(info->inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1));
const bool multisample_fbo = rast->cso.multisample && fb->samples > 1;
key->multisample_fbo = multisample_fbo ? BRW_ALWAYS : BRW_NEVER;
key->multisample_fbo = multisample_fbo ? ELK_ALWAYS : ELK_NEVER;
key->persample_interp =
rast->cso.force_persample_interp ? BRW_ALWAYS : BRW_NEVER;
rast->cso.force_persample_interp ? ELK_ALWAYS : ELK_NEVER;
key->ignore_sample_mask_out = !multisample_fbo;
key->coherent_fb_fetch = false; // TODO: needed?
@ -4857,7 +4857,7 @@ crocus_populate_fs_key(const struct crocus_context *ice,
static void
crocus_populate_cs_key(const struct crocus_context *ice,
struct brw_cs_prog_key *key)
struct elk_cs_prog_key *key)
{
}
@ -5304,7 +5304,7 @@ emit_sol_surface(struct crocus_batch *batch,
* too big to map using a single binding table entry?
*/
// assert((size_dwords - offset_dwords) / stride_dwords
// <= BRW_MAX_NUM_BUFFER_ENTRIES);
// <= ELK_MAX_NUM_BUFFER_ENTRIES);
if (size_dwords > offset_dwords + num_vector_components) {
/* There is room for at least 1 transform feedback output in the buffer.
@ -5393,7 +5393,7 @@ crocus_populate_binding_table(struct crocus_context *ice,
const struct pipe_rt_blend_state *rt =
&ice->state.cso_blend->cso.rt[ice->state.cso_blend->cso.independent_blend_enable ? i : 0];
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_FRAGMENT];
struct brw_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
struct elk_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
write_disables |= (rt->colormask & PIPE_MASK_A) ? 0x0 : 0x8;
write_disables |= (rt->colormask & PIPE_MASK_R) ? 0x0 : 0x4;
write_disables |= (rt->colormask & PIPE_MASK_G) ? 0x0 : 0x2;
@ -5649,13 +5649,13 @@ setup_constant_buffers(struct crocus_context *ice,
{
struct crocus_shader_state *shs = &ice->state.shaders[stage];
struct crocus_compiled_shader *shader = ice->shaders.prog[stage];
struct brw_stage_prog_data *prog_data = (void *) shader->prog_data;
struct elk_stage_prog_data *prog_data = (void *) shader->prog_data;
uint32_t push_range_sum = 0;
int n = 0;
for (int i = 0; i < 4; i++) {
const struct brw_ubo_range *range = &prog_data->ubo_ranges[i];
const struct elk_ubo_range *range = &prog_data->ubo_ranges[i];
if (range->length == 0)
continue;
@ -5713,7 +5713,7 @@ emit_push_constant_packets(struct crocus_context *ice,
const struct push_bos *push_bos)
{
struct crocus_compiled_shader *shader = ice->shaders.prog[stage];
struct brw_stage_prog_data *prog_data = shader ? (void *) shader->prog_data : NULL;
struct elk_stage_prog_data *prog_data = shader ? (void *) shader->prog_data : NULL;
UNUSED uint32_t mocs = crocus_mocs(NULL, &batch->screen->isl_dev);
#if GFX_VER == 7
@ -5889,8 +5889,8 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
if (dirty & (CROCUS_DIRTY_GEN4_CURBE | CROCUS_DIRTY_RASTER) ||
stage_dirty & CROCUS_STAGE_DIRTY_VS) {
bool ret = crocus_calculate_urb_fence(batch, ice->curbe.total_size,
brw_vue_prog_data(ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data)->urb_entry_size,
((struct brw_sf_prog_data *)ice->shaders.sf_prog->prog_data)->urb_entry_size);
elk_vue_prog_data(ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data)->urb_entry_size,
((struct elk_sf_prog_data *)ice->shaders.sf_prog->prog_data)->urb_entry_size);
if (ret) {
dirty |= CROCUS_DIRTY_GEN5_PIPELINED_POINTERS | CROCUS_DIRTY_RASTER | CROCUS_DIRTY_CLIP;
stage_dirty |= CROCUS_STAGE_DIRTY_GS | CROCUS_STAGE_DIRTY_VS;
@ -6041,12 +6041,12 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
bool gs_present = ice->shaders.prog[MESA_SHADER_GEOMETRY] != NULL
|| ice->shaders.ff_gs_prog;
struct brw_vue_prog_data *vue_prog_data =
struct elk_vue_prog_data *vue_prog_data =
(void *) ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data;
const unsigned vs_size = vue_prog_data->urb_entry_size;
unsigned gs_size = vs_size;
if (ice->shaders.prog[MESA_SHADER_GEOMETRY]) {
struct brw_vue_prog_data *gs_vue_prog_data =
struct elk_vue_prog_data *gs_vue_prog_data =
(void *) ice->shaders.prog[MESA_SHADER_GEOMETRY]->prog_data;
gs_size = gs_vue_prog_data->urb_entry_size;
}
@ -6063,7 +6063,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
if (!ice->shaders.prog[i]) {
urb_cfg.size[i] = 1;
} else {
struct brw_vue_prog_data *vue_prog_data =
struct elk_vue_prog_data *vue_prog_data =
(void *) ice->shaders.prog[i]->prog_data;
urb_cfg.size[i] = vue_prog_data->urb_entry_size;
}
@ -6134,7 +6134,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
struct GENX(BLEND_STATE) be = { 0 };
{
#else
for (int i = 0; i < BRW_MAX_DRAW_BUFFERS; i++) {
for (int i = 0; i < ELK_MAX_DRAW_BUFFERS; i++) {
struct GENX(BLEND_STATE_ENTRY) entry = { 0 };
#define be entry
#endif
@ -6147,7 +6147,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
be.ColorDitherEnable = cso_blend->cso.dither;
#if GFX_VER >= 8
for (int i = 0; i < BRW_MAX_DRAW_BUFFERS; i++) {
for (int i = 0; i < ELK_MAX_DRAW_BUFFERS; i++) {
struct GENX(BLEND_STATE_ENTRY) entry = { 0 };
#else
{
@ -6426,8 +6426,8 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
#if GFX_VER >= 7
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_FRAGMENT];
if ((stage_dirty & CROCUS_STAGE_DIRTY_FS) && shader) {
struct brw_stage_prog_data *prog_data = shader->prog_data;
struct brw_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
struct elk_stage_prog_data *prog_data = shader->prog_data;
struct elk_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
crocus_emit_cmd(batch, GENX(3DSTATE_PS), ps) {
@ -6443,18 +6443,18 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
0 /* msaa_flags */);
ps.DispatchGRFStartRegisterForConstantSetupData0 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 0);
elk_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 0);
ps.DispatchGRFStartRegisterForConstantSetupData1 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 1);
elk_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 1);
ps.DispatchGRFStartRegisterForConstantSetupData2 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 2);
elk_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, ps, 2);
ps.KernelStartPointer0 = KSP(ice, shader) +
brw_wm_prog_data_prog_offset(wm_prog_data, ps, 0);
elk_wm_prog_data_prog_offset(wm_prog_data, ps, 0);
ps.KernelStartPointer1 = KSP(ice, shader) +
brw_wm_prog_data_prog_offset(wm_prog_data, ps, 1);
elk_wm_prog_data_prog_offset(wm_prog_data, ps, 1);
ps.KernelStartPointer2 = KSP(ice, shader) +
brw_wm_prog_data_prog_offset(wm_prog_data, ps, 2);
elk_wm_prog_data_prog_offset(wm_prog_data, ps, 2);
#if GFX_VERx10 == 75
ps.SampleMask = determine_sample_mask(ice);
@ -6509,9 +6509,9 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
psx.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth;
psx.PixelShaderUsesSourceW = wm_prog_data->uses_src_w;
psx.PixelShaderIsPerSample =
brw_wm_prog_data_is_persample(wm_prog_data, 0);
elk_wm_prog_data_is_persample(wm_prog_data, 0);
/* _NEW_MULTISAMPLE | BRW_NEW_CONSERVATIVE_RASTERIZATION */
/* _NEW_MULTISAMPLE | ELK_NEW_CONSERVATIVE_RASTERIZATION */
if (wm_prog_data->uses_sample_mask)
psx.PixelShaderUsesInputCoverageMask = true;
@ -6638,7 +6638,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
if (dirty & CROCUS_DIRTY_CLIP) {
#if GFX_VER < 6
const struct brw_clip_prog_data *clip_prog_data = (struct brw_clip_prog_data *)ice->shaders.clip_prog->prog_data;
const struct elk_clip_prog_data *clip_prog_data = (struct elk_clip_prog_data *)ice->shaders.clip_prog->prog_data;
struct pipe_rasterizer_state *cso_state = &ice->state.cso_rast->cso;
uint32_t *clip_ptr = stream_state(batch, GENX(CLIP_STATE_length) * 4, 32, &ice->shaders.clip_offset);
@ -6705,7 +6705,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
#else //if GFX_VER >= 6
struct crocus_rasterizer_state *cso_rast = ice->state.cso_rast;
const struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data );
const struct elk_wm_prog_data *wm_prog_data = elk_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data );
struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
bool gs_or_tes = ice->shaders.prog[MESA_SHADER_GEOMETRY] ||
ice->shaders.prog[MESA_SHADER_TESS_EVAL];
@ -6726,7 +6726,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
cl.ViewportXYClipTestEnable = !points_or_lines;
cl.UserClipDistanceCullTestEnableBitmask =
brw_vue_prog_data(ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data)->cull_distance_mask;
elk_vue_prog_data(ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data)->cull_distance_mask;
cl.NonPerspectiveBarycentricEnable = wm_prog_data->uses_nonperspective_interp_modes;
@ -6740,8 +6740,8 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
if (stage_dirty & CROCUS_STAGE_DIRTY_VS) {
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_VERTEX];
const struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(shader->prog_data);
const struct brw_stage_prog_data *prog_data = &vue_prog_data->base;
const struct elk_vue_prog_data *vue_prog_data = elk_vue_prog_data(shader->prog_data);
const struct elk_stage_prog_data *prog_data = &vue_prog_data->base;
#if GFX_VER == 7
if (batch->screen->devinfo.platform == INTEL_PLATFORM_IVB)
gen7_emit_vs_workaround_flush(batch);
@ -6847,9 +6847,9 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
{
#if GFX_VER >= 6
if (active) {
const struct brw_gs_prog_data *gs_prog_data = brw_gs_prog_data(shader->prog_data);
const struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(shader->prog_data);
const struct brw_stage_prog_data *prog_data = &gs_prog_data->base.base;
const struct elk_gs_prog_data *gs_prog_data = elk_gs_prog_data(shader->prog_data);
const struct elk_vue_prog_data *vue_prog_data = elk_vue_prog_data(shader->prog_data);
const struct elk_stage_prog_data *prog_data = &gs_prog_data->base.base;
INIT_THREAD_DISPATCH_FIELDS(gs, Vertex, MESA_SHADER_GEOMETRY);
#if GFX_VER >= 7
@ -6934,7 +6934,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
#endif
#if GFX_VER <= 6
if (!active && ice->shaders.ff_gs_prog) {
const struct brw_ff_gs_prog_data *gs_prog_data = (struct brw_ff_gs_prog_data *)ice->shaders.ff_gs_prog->prog_data;
const struct elk_ff_gs_prog_data *gs_prog_data = (struct elk_ff_gs_prog_data *)ice->shaders.ff_gs_prog->prog_data;
/* In gen6, transform feedback for the VS stage is done with an
* ad-hoc GS program. This function provides the needed 3DSTATE_GS
* for this.
@ -6947,7 +6947,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
#if GFX_VER <= 5
gs.GRFRegisterCount =
DIV_ROUND_UP(gs_prog_data->total_grf, 16) - 1;
/* BRW_NEW_URB_FENCE */
/* ELK_NEW_URB_FENCE */
gs.NumberofURBEntries = batch->ice->urb.nr_gs_entries;
gs.URBEntryAllocationSize = batch->ice->urb.vsize - 1;
gs.MaximumNumberofThreads = batch->ice->urb.nr_gs_entries >= 8 ? 1 : 0;
@ -6989,9 +6989,9 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_TESS_CTRL];
if (shader) {
const struct brw_tcs_prog_data *tcs_prog_data = brw_tcs_prog_data(shader->prog_data);
const struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(shader->prog_data);
const struct brw_stage_prog_data *prog_data = &tcs_prog_data->base.base;
const struct elk_tcs_prog_data *tcs_prog_data = elk_tcs_prog_data(shader->prog_data);
const struct elk_vue_prog_data *vue_prog_data = elk_vue_prog_data(shader->prog_data);
const struct elk_stage_prog_data *prog_data = &tcs_prog_data->base.base;
crocus_emit_cmd(batch, GENX(3DSTATE_HS), hs) {
INIT_THREAD_DISPATCH_FIELDS(hs, Vertex, MESA_SHADER_TESS_CTRL);
@ -7008,9 +7008,9 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
if (stage_dirty & CROCUS_STAGE_DIRTY_TES) {
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_TESS_EVAL];
if (shader) {
const struct brw_tes_prog_data *tes_prog_data = brw_tes_prog_data(shader->prog_data);
const struct brw_vue_prog_data *vue_prog_data = brw_vue_prog_data(shader->prog_data);
const struct brw_stage_prog_data *prog_data = &tes_prog_data->base.base;
const struct elk_tes_prog_data *tes_prog_data = elk_tes_prog_data(shader->prog_data);
const struct elk_vue_prog_data *vue_prog_data = elk_vue_prog_data(shader->prog_data);
const struct elk_stage_prog_data *prog_data = &tes_prog_data->base.base;
crocus_emit_cmd(batch, GENX(3DSTATE_TE), te) {
te.Partitioning = tes_prog_data->partitioning;
@ -7043,7 +7043,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
if (dirty & CROCUS_DIRTY_RASTER) {
#if GFX_VER < 6
const struct brw_sf_prog_data *sf_prog_data = (struct brw_sf_prog_data *)ice->shaders.sf_prog->prog_data;
const struct elk_sf_prog_data *sf_prog_data = (struct elk_sf_prog_data *)ice->shaders.sf_prog->prog_data;
struct pipe_rasterizer_state *cso_state = &ice->state.cso_rast->cso;
uint32_t *sf_ptr = stream_state(batch,
GENX(SF_STATE_length) * 4, 32, &ice->shaders.sf_offset);
@ -7053,7 +7053,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
sf.FloatingPointMode = FLOATING_POINT_MODE_Alternate;
sf.GRFRegisterCount = DIV_ROUND_UP(sf_prog_data->total_grf, 16) - 1;
sf.DispatchGRFStartRegisterForURBData = 3;
sf.VertexURBEntryReadOffset = BRW_SF_URB_ENTRY_READ_OFFSET;
sf.VertexURBEntryReadOffset = ELK_SF_URB_ENTRY_READ_OFFSET;
sf.VertexURBEntryReadLength = sf_prog_data->urb_read_length;
sf.URBEntryAllocationSize = batch->ice->urb.sfsize - 1;
sf.NumberofURBEntries = batch->ice->urb.nr_sf_entries;
@ -7099,7 +7099,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
sf.ViewportTransformEnable = !ice->state.window_space_position;
#if GFX_VER == 6
const struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data);
const struct elk_wm_prog_data *wm_prog_data = elk_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data);
uint32_t urb_entry_read_length;
uint32_t urb_entry_read_offset;
uint32_t point_sprite_enables;
@ -7140,8 +7140,8 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
if (dirty & CROCUS_DIRTY_WM) {
struct crocus_rasterizer_state *cso = ice->state.cso_rast;
const struct brw_wm_prog_data *wm_prog_data = brw_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data);
UNUSED bool writes_depth = wm_prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF;
const struct elk_wm_prog_data *wm_prog_data = elk_wm_prog_data(ice->shaders.prog[MESA_SHADER_FRAGMENT]->prog_data);
UNUSED bool writes_depth = wm_prog_data->computed_depth_mode != ELK_PSCDEPTH_OFF;
UNUSED const struct shader_info *fs_info =
crocus_get_shader_info(ice, MESA_SHADER_FRAGMENT);
@ -7169,40 +7169,40 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
#endif
#if GFX_VER == 4
/* On gen4, we only have one shader kernel */
if (brw_wm_state_has_ksp(wm, 0)) {
if (elk_wm_state_has_ksp(wm, 0)) {
wm.KernelStartPointer0 = KSP(ice, ice->shaders.prog[MESA_SHADER_FRAGMENT]);
wm.GRFRegisterCount0 = brw_wm_prog_data_reg_blocks(wm_prog_data, wm, 0);
wm.GRFRegisterCount0 = elk_wm_prog_data_reg_blocks(wm_prog_data, wm, 0);
wm.DispatchGRFStartRegisterForConstantSetupData0 =
wm_prog_data->base.dispatch_grf_start_reg;
}
#elif GFX_VER == 5
wm.KernelStartPointer0 = KSP(ice, ice->shaders.prog[MESA_SHADER_FRAGMENT]) +
brw_wm_prog_data_prog_offset(wm_prog_data, wm, 0);
elk_wm_prog_data_prog_offset(wm_prog_data, wm, 0);
wm.KernelStartPointer1 = KSP(ice, ice->shaders.prog[MESA_SHADER_FRAGMENT]) +
brw_wm_prog_data_prog_offset(wm_prog_data, wm, 1);
elk_wm_prog_data_prog_offset(wm_prog_data, wm, 1);
wm.KernelStartPointer2 = KSP(ice, ice->shaders.prog[MESA_SHADER_FRAGMENT]) +
brw_wm_prog_data_prog_offset(wm_prog_data, wm, 2);
elk_wm_prog_data_prog_offset(wm_prog_data, wm, 2);
wm.GRFRegisterCount0 = brw_wm_prog_data_reg_blocks(wm_prog_data, wm, 0);
wm.GRFRegisterCount1 = brw_wm_prog_data_reg_blocks(wm_prog_data, wm, 1);
wm.GRFRegisterCount2 = brw_wm_prog_data_reg_blocks(wm_prog_data, wm, 2);
wm.GRFRegisterCount0 = elk_wm_prog_data_reg_blocks(wm_prog_data, wm, 0);
wm.GRFRegisterCount1 = elk_wm_prog_data_reg_blocks(wm_prog_data, wm, 1);
wm.GRFRegisterCount2 = elk_wm_prog_data_reg_blocks(wm_prog_data, wm, 2);
wm.DispatchGRFStartRegisterForConstantSetupData0 =
wm_prog_data->base.dispatch_grf_start_reg;
#elif GFX_VER == 6
wm.KernelStartPointer0 = KSP(ice, ice->shaders.prog[MESA_SHADER_FRAGMENT]) +
brw_wm_prog_data_prog_offset(wm_prog_data, wm, 0);
elk_wm_prog_data_prog_offset(wm_prog_data, wm, 0);
wm.KernelStartPointer1 = KSP(ice, ice->shaders.prog[MESA_SHADER_FRAGMENT]) +
brw_wm_prog_data_prog_offset(wm_prog_data, wm, 1);
elk_wm_prog_data_prog_offset(wm_prog_data, wm, 1);
wm.KernelStartPointer2 = KSP(ice, ice->shaders.prog[MESA_SHADER_FRAGMENT]) +
brw_wm_prog_data_prog_offset(wm_prog_data, wm, 2);
elk_wm_prog_data_prog_offset(wm_prog_data, wm, 2);
wm.DispatchGRFStartRegisterForConstantSetupData0 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, wm, 0);
elk_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, wm, 0);
wm.DispatchGRFStartRegisterForConstantSetupData1 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, wm, 1);
elk_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, wm, 1);
wm.DispatchGRFStartRegisterForConstantSetupData2 =
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, wm, 2);
elk_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, wm, 2);
#endif
#if GFX_VER <= 5
wm.ConstantURBEntryReadLength = wm_prog_data->base.curb_read_length;
@ -7283,7 +7283,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
else
wm.MultisampleRasterizationMode = MSRASTMODE_OFF_PIXEL;
if (brw_wm_prog_data_is_persample(wm_prog_data, 0))
if (elk_wm_prog_data_is_persample(wm_prog_data, 0))
wm.MultisampleDispatchMode = MSDISPMODE_PERSAMPLE;
else
wm.MultisampleDispatchMode = MSDISPMODE_PERPIXEL;
@ -7326,7 +7326,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
* DISPATCH_ENABLE bit can be set independently from it.
* C.f. gen8_upload_ps_extra().
*
* BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_FS_PROG_DATA | _NEW_BUFFERS |
* ELK_NEW_FRAGMENT_PROGRAM | ELK_NEW_FS_PROG_DATA | _NEW_BUFFERS |
* _NEW_COLOR
*/
#if GFX_VERx10 == 75
@ -7336,7 +7336,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
#endif
#endif
#if GFX_VER >= 7
/* BRW_NEW_FS_PROG_DATA */
/* ELK_NEW_FS_PROG_DATA */
if (wm_prog_data->early_fragment_tests)
wm.EarlyDepthStencilControl = EDSC_PREPS;
else if (wm_prog_data->has_side_effects)
@ -7370,7 +7370,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
struct crocus_compiled_shader *shader = ice->shaders.prog[MESA_SHADER_FRAGMENT];
struct crocus_blend_state *cso_blend = ice->state.cso_blend;
struct crocus_depth_stencil_alpha_state *cso_zsa = ice->state.cso_zsa;
struct brw_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
struct elk_wm_prog_data *wm_prog_data = (void *) shader->prog_data;
const struct shader_info *fs_info =
crocus_get_shader_info(ice, MESA_SHADER_FRAGMENT);
uint32_t dynamic_pb[GENX(3DSTATE_PS_BLEND_length)];
@ -7729,7 +7729,7 @@ crocus_upload_dirty_render_state(struct crocus_context *ice,
#if GFX_VER == 8
if (dirty & CROCUS_DIRTY_GEN8_VF_SGVS) {
const struct brw_vs_prog_data *vs_prog_data = (void *)
const struct elk_vs_prog_data *vs_prog_data = (void *)
ice->shaders.prog[MESA_SHADER_VERTEX]->prog_data;
struct crocus_vertex_element_state *cso = ice->state.cso_vertex_elements;
@ -8049,10 +8049,10 @@ crocus_upload_compute_state(struct crocus_context *ice,
struct crocus_shader_state *shs = &ice->state.shaders[MESA_SHADER_COMPUTE];
struct crocus_compiled_shader *shader =
ice->shaders.prog[MESA_SHADER_COMPUTE];
struct brw_stage_prog_data *prog_data = shader->prog_data;
struct brw_cs_prog_data *cs_prog_data = (void *) prog_data;
struct elk_stage_prog_data *prog_data = shader->prog_data;
struct elk_cs_prog_data *cs_prog_data = (void *) prog_data;
const struct intel_cs_dispatch_info dispatch =
brw_cs_get_dispatch_info(devinfo, cs_prog_data, grid->block);
elk_cs_get_dispatch_info(devinfo, cs_prog_data, grid->block);
crocus_update_surface_base_address(batch);
if ((stage_dirty & CROCUS_STAGE_DIRTY_CONSTANTS_CS) && shs->sysvals_need_upload)
@ -8133,9 +8133,9 @@ crocus_upload_compute_state(struct crocus_context *ice,
uint32_t curbe_data_offset = 0;
assert(cs_prog_data->push.cross_thread.dwords == 0 &&
cs_prog_data->push.per_thread.dwords == 1 &&
cs_prog_data->base.param[0] == BRW_PARAM_BUILTIN_SUBGROUP_ID);
cs_prog_data->base.param[0] == ELK_PARAM_BUILTIN_SUBGROUP_ID);
const unsigned push_const_size =
brw_cs_push_const_total_size(cs_prog_data, dispatch.threads);
elk_cs_push_const_total_size(cs_prog_data, dispatch.threads);
uint32_t *curbe_data_map =
stream_state(batch,
ALIGN(push_const_size, 64), 64,
@ -8156,7 +8156,7 @@ crocus_upload_compute_state(struct crocus_context *ice,
CROCUS_STAGE_DIRTY_CONSTANTS_CS |
CROCUS_STAGE_DIRTY_CS)) {
uint32_t desc[GENX(INTERFACE_DESCRIPTOR_DATA_length)];
const uint64_t ksp = KSP(ice,shader) + brw_cs_prog_data_prog_offset(cs_prog_data, dispatch.simd_size);
const uint64_t ksp = KSP(ice,shader) + elk_cs_prog_data_prog_offset(cs_prog_data, dispatch.simd_size);
crocus_pack_state(GENX(INTERFACE_DESCRIPTOR_DATA), desc, idd) {
idd.KernelStartPointer = ksp;
idd.SamplerStatePointer = shs->sampler_offset;
@ -8165,8 +8165,8 @@ crocus_upload_compute_state(struct crocus_context *ice,
idd.NumberofThreadsinGPGPUThreadGroup = dispatch.threads;
idd.ConstantURBEntryReadLength = cs_prog_data->push.per_thread.regs;
idd.BarrierEnable = cs_prog_data->uses_barrier;
idd.SharedLocalMemorySize = encode_slm_size(GFX_VER,
prog_data->total_shared);
idd.SharedLocalMemorySize = elk_encode_slm_size(GFX_VER,
prog_data->total_shared);
#if GFX_VERx10 >= 75
idd.CrossThreadConstantDataReadLength = cs_prog_data->push.cross_thread.regs;
#endif

22
src/gallium/drivers/crocus/gen4_blorp_exec.h
View file

@ -68,7 +68,7 @@ blorp_emit_sf_state(struct blorp_batch *blorp_batch,
const struct blorp_params *params)
{
struct crocus_batch *batch = blorp_batch->driver_batch;
const struct brw_sf_prog_data *prog_data = params->sf_prog_data;
const struct elk_sf_prog_data *prog_data = params->sf_prog_data;
uint32_t offset;
blorp_emit_dynamic(blorp_batch, GENX(SF_STATE), sf, 64, &offset) {
@ -80,7 +80,7 @@ blorp_emit_sf_state(struct blorp_batch *blorp_batch,
#endif
sf.GRFRegisterCount = DIV_ROUND_UP(prog_data->total_grf, 16) - 1;
sf.VertexURBEntryReadLength = prog_data->urb_read_length;
sf.VertexURBEntryReadOffset = BRW_SF_URB_ENTRY_READ_OFFSET;
sf.VertexURBEntryReadOffset = ELK_SF_URB_ENTRY_READ_OFFSET;
sf.DispatchGRFStartRegisterForURBData = 3;
sf.URBEntryAllocationSize = batch->ice->urb.sfsize - 1;
sf.NumberofURBEntries = batch->ice->urb.nr_sf_entries;
@ -102,7 +102,7 @@ static struct blorp_address
blorp_emit_wm_state(struct blorp_batch *blorp_batch,
const struct blorp_params *params)
{
const struct brw_wm_prog_data *prog_data = params->wm_prog_data;
const struct elk_wm_prog_data *prog_data = params->wm_prog_data;
uint32_t offset;
blorp_emit_dynamic(blorp_batch, GENX(WM_STATE), wm, 64, &offset) {
@ -132,22 +132,22 @@ blorp_emit_wm_state(struct blorp_batch *blorp_batch,
#if GFX_VER == 4
wm.KernelStartPointer0 =
instruction_state_address(blorp_batch, params->wm_prog_kernel);
wm.GRFRegisterCount0 = brw_wm_prog_data_reg_blocks(prog_data, wm, 0);
wm.GRFRegisterCount0 = elk_wm_prog_data_reg_blocks(prog_data, wm, 0);
#else
wm.KernelStartPointer0 = params->wm_prog_kernel +
brw_wm_prog_data_prog_offset(prog_data, wm, 0);
elk_wm_prog_data_prog_offset(prog_data, wm, 0);
wm.KernelStartPointer1 = params->wm_prog_kernel +
brw_wm_prog_data_prog_offset(prog_data, wm, 1);
elk_wm_prog_data_prog_offset(prog_data, wm, 1);
wm.KernelStartPointer2 = params->wm_prog_kernel +
brw_wm_prog_data_prog_offset(prog_data, wm, 2);
wm.GRFRegisterCount0 = brw_wm_prog_data_reg_blocks(prog_data, wm, 0);
wm.GRFRegisterCount1 = brw_wm_prog_data_reg_blocks(prog_data, wm, 1);
wm.GRFRegisterCount2 = brw_wm_prog_data_reg_blocks(prog_data, wm, 2);
elk_wm_prog_data_prog_offset(prog_data, wm, 2);
wm.GRFRegisterCount0 = elk_wm_prog_data_reg_blocks(prog_data, wm, 0);
wm.GRFRegisterCount1 = elk_wm_prog_data_reg_blocks(prog_data, wm, 1);
wm.GRFRegisterCount2 = elk_wm_prog_data_reg_blocks(prog_data, wm, 2);
#endif
}
wm.MaximumNumberofThreads =
blorp_batch->blorp->compiler->brw->devinfo->max_wm_threads - 1;
blorp_batch->blorp->compiler->elk->devinfo->max_wm_threads - 1;
}
return dynamic_state_address(blorp_batch, offset);

6
src/gallium/drivers/crocus/meson.build
View file

@ -64,7 +64,7 @@ foreach v : ['40', '45', '50', '60', '70', '75', '80']
'-DGFX_VERx10=@0@'.format(v),
],
gnu_symbol_visibility : 'hidden',
dependencies : [dep_libdrm, dep_valgrind, idep_genxml, idep_nir_headers, idep_intel_dev, idep_intel_blorp],
dependencies : [dep_libdrm, dep_valgrind, idep_genxml, idep_nir_headers, idep_intel_dev, idep_intel_blorp_elk],
)
endforeach
@ -83,10 +83,10 @@ libcrocus = static_library(
dependencies : [
dep_libdrm, dep_valgrind, idep_genxml,
idep_libintel_common, idep_nir_headers,
idep_intel_dev, idep_intel_blorp, idep_intel_decoder_brw,
idep_intel_dev, idep_intel_blorp_elk, idep_intel_decoder_elk,
],
link_with : [
crocus_per_hw_ver_libs, libintel_compiler, libisl,
crocus_per_hw_ver_libs, libintel_compiler_elk, libisl,
libintel_perf
],
)