anvil,hasvk: Replace intel_clflush_range with intel_flush_range

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22379>
This commit is contained in:
Jordan Justen 2023-08-04 11:37:21 -07:00 committed by Marge Bot
parent 543a707b7b
commit 486e7bdbd8
7 changed files with 12 additions and 13 deletions

View file

@ -26,7 +26,7 @@
#include <stdint.h>
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
void
static void
intel_clflush_range(void *start, size_t size)
{
void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);

View file

@ -34,7 +34,6 @@ extern "C" {
#define CACHELINE_MASK 63
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
void intel_clflush_range(void *start, size_t size);
void intel_flush_range(void *start, size_t size);
void intel_invalidate_range(void *start, size_t size);
#endif

View file

@ -2854,7 +2854,7 @@ anv_device_init_trivial_batch(struct anv_device *device)
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
if (device->physical->memory.need_flush)
intel_clflush_range(batch.start, batch.next - batch.start);
intel_flush_range(batch.start, batch.next - batch.start);
#endif
return VK_SUCCESS;
@ -4211,9 +4211,9 @@ VkResult anv_FlushMappedMemoryRanges(
if (map_offset >= mem->map_size)
continue;
intel_clflush_range(mem->map + map_offset,
MIN2(pMemoryRanges[i].size,
mem->map_size - map_offset));
intel_flush_range(mem->map + map_offset,
MIN2(pMemoryRanges[i].size,
mem->map_size - map_offset));
}
#endif
return VK_SUCCESS;

View file

@ -249,7 +249,7 @@ anv_utrace_create_ts_buffer(struct u_trace_context *utctx, uint32_t size_b)
memset(bo->map, 0, bo->size);
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
if (device->physical->memory.need_flush)
intel_clflush_range(bo->map, bo->size);
intel_flush_range(bo->map, bo->size);
#endif
return bo;

View file

@ -115,7 +115,7 @@ VkResult anv_QueuePresentKHR(
device->debug_frame_desc->frame_id++;
#ifdef SUPPORT_INTEL_INTEGRATED_GPUS
if (device->physical->memory.need_flush) {
intel_clflush_range(device->debug_frame_desc,
intel_flush_range(device->debug_frame_desc,
sizeof(*device->debug_frame_desc));
}
#endif

View file

@ -2536,7 +2536,7 @@ anv_device_init_trivial_batch(struct anv_device *device)
anv_batch_emit(&batch, GFX7_MI_NOOP, noop);
if (device->physical->memory.need_flush)
intel_clflush_range(batch.start, batch.next - batch.start);
intel_flush_range(batch.start, batch.next - batch.start);
return VK_SUCCESS;
}
@ -3693,9 +3693,9 @@ VkResult anv_FlushMappedMemoryRanges(
if (map_offset >= mem->map_size)
continue;
intel_clflush_range(mem->map + map_offset,
MIN2(pMemoryRanges[i].size,
mem->map_size - map_offset));
intel_flush_range(mem->map + map_offset,
MIN2(pMemoryRanges[i].size,
mem->map_size - map_offset));
}
return VK_SUCCESS;

View file

@ -98,7 +98,7 @@ VkResult anv_QueuePresentKHR(
if (device->debug_frame_desc) {
device->debug_frame_desc->frame_id++;
if (device->physical->memory.need_flush) {
intel_clflush_range(device->debug_frame_desc,
intel_flush_range(device->debug_frame_desc,
sizeof(*device->debug_frame_desc));
}
}