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radv: initialize nir_shader_compiler_options directly in compiler info

Browse source 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41022>
This commit is contained in:
Rhys Perry 2026-04-17 10:54:04 +01:00 • committed by Marge Bot
parent 0249fcfbb6
commit 48645f21b5
8 changed files with 14 additions and 19 deletions
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2
src/amd/vulkan/meta/radv_meta.c
View file

@ -347,7 +347,7 @@ radv_device_init_meta(struct radv_device *device)
if (pdev->emulate_etc2) {
device->meta_state.etc_decode.allocator = &device->meta_state.alloc;
device->meta_state.etc_decode.nir_options = &pdev->nir_options[MESA_SHADER_COMPUTE];
device->meta_state.etc_decode.nir_options = &device->compiler_info.nir_options[MESA_SHADER_COMPUTE];
device->meta_state.etc_decode.pipeline_cache = device->meta_state.cache;
vk_texcompress_etc2_init(&device->vk, &device->meta_state.etc_decode);

3
src/amd/vulkan/radv_device.c
View file

@ -1221,8 +1221,7 @@ radv_device_init_compiler_info(struct radv_device *device)
.spirv_caps = vk_physical_device_get_spirv_capabilities(device->vk.physical),
};
for (uint32_t s = 0; s < MESA_VULKAN_SHADER_STAGES; s++)
info.nir_options[s] = pdev->nir_options[s];
radv_get_nir_options(&info);
device->compiler_info = info;
}

2
src/amd/vulkan/radv_physical_device.c
View file

@ -2688,8 +2688,6 @@ radv_physical_device_try_create(struct radv_instance *instance, drmDevicePtr drm
radv_physical_device_init_cache_key(pdev);
radv_get_nir_options(pdev);
if (radv_device_get_cache_uuid(pdev, pdev->cache_uuid)) {
result = vk_errorf(instance, VK_ERROR_INITIALIZATION_FAILED, "cannot generate UUID");
goto fail_wsi;

2
src/amd/vulkan/radv_physical_device.h
View file

@ -178,8 +178,6 @@ struct radv_physical_device {
dev_t render_devid;
#endif
nir_shader_compiler_options nir_options[MESA_VULKAN_SHADER_STAGES];
enum radv_queue_family vk_queue_to_radv[RADV_MAX_QUEUE_FAMILIES];
uint32_t num_queues;

3
src/amd/vulkan/radv_pipeline_graphics.c
View file

@ -2225,7 +2225,6 @@ static void
radv_pipeline_import_retained_shaders(const struct radv_device *device, struct radv_graphics_lib_pipeline *lib,
struct radv_shader_stage *stages)
{
const struct radv_physical_device *pdev = radv_device_physical(device);
struct radv_retained_shaders *retained_shaders = &lib->retained_shaders;
/* Import the stages (SPIR-V only in case of cache hits). */
@ -2244,7 +2243,7 @@ radv_pipeline_import_retained_shaders(const struct radv_device *device, struct r
int64_t stage_start = os_time_get_nano();
/* Deserialize the NIR shader. */
const struct nir_shader_compiler_options *options = &pdev->nir_options[s];
const struct nir_shader_compiler_options *options = &device->compiler_info.nir_options[s];
struct blob_reader blob_reader;
blob_reader_init(&blob_reader, retained_shaders->stages[s].serialized_nir,
retained_shaders->stages[s].serialized_nir_size);

2
src/amd/vulkan/radv_pipeline_rt.c
View file

@ -1051,7 +1051,7 @@ compile_rt_prolog(struct radv_device *device, struct radv_ray_tracing_pipeline *
struct radv_shader_stage prolog_stage = {0};
struct radv_shader_debug_info debug = {0};
radv_build_rt_prolog(&device->compiler_info, &prolog_stage, uses_descriptor_heap, &debug);
prolog_stage.nir->options = &pdev->nir_options[MESA_SHADER_COMPUTE];
prolog_stage.nir->options = &device->compiler_info.nir_options[MESA_SHADER_COMPUTE];
radv_optimize_nir(prolog_stage.nir, false);
radv_postprocess_nir(&device->compiler_info, NULL, &prolog_stage);

17
src/amd/vulkan/radv_shader.c
View file

@ -53,15 +53,16 @@
#endif
static void
get_nir_options_for_stage(struct radv_physical_device *pdev, mesa_shader_stage stage)
get_nir_options_for_stage(struct radv_compiler_info *compiler_info, mesa_shader_stage stage)
{
nir_shader_compiler_options *options = &pdev->nir_options[stage];
const bool split_fma = (stage <= MESA_SHADER_GEOMETRY || stage == MESA_SHADER_MESH) && pdev->cache_key.split_fma;
nir_shader_compiler_options *options = &compiler_info->nir_options[stage];
const bool split_fma =
(stage <= MESA_SHADER_GEOMETRY || stage == MESA_SHADER_MESH) && compiler_info->cache_key->split_fma;
ac_nir_set_options(&pdev->info.compiler_info, pdev->use_llvm, options);
ac_nir_set_options(compiler_info->ac, compiler_info->debug.use_llvm, options);
options->lower_ffma16 = split_fma || pdev->info.gfx_level < GFX9;
options->lower_ffma32 = split_fma || pdev->info.gfx_level < GFX10_3;
options->lower_ffma16 = split_fma || compiler_info->ac->gfx_level < GFX9;
options->lower_ffma32 = split_fma || compiler_info->ac->gfx_level < GFX10_3;
options->lower_ffma64 = split_fma;
options->max_unroll_iterations = 32;
options->max_unroll_iterations_aggressive = 128;
@ -71,10 +72,10 @@ get_nir_options_for_stage(struct radv_physical_device *pdev, mesa_shader_stage s
}
void
radv_get_nir_options(struct radv_physical_device *pdev)
radv_get_nir_options(struct radv_compiler_info *compiler_info)
{
for (mesa_shader_stage stage = MESA_SHADER_VERTEX; stage < MESA_VULKAN_SHADER_STAGES; stage++)
get_nir_options_for_stage(pdev, stage);
get_nir_options_for_stage(compiler_info, stage);
}
static uint8_t

2
src/amd/vulkan/radv_shader.h
View file

@ -758,7 +758,7 @@ bool radv_consider_culling(const struct radv_compiler_info *compiler_info, struc
uint64_t ps_inputs_read, unsigned num_vertices_per_primitive,
const struct radv_shader_info *info);
void radv_get_nir_options(struct radv_physical_device *pdev);
void radv_get_nir_options(struct radv_compiler_info *compiler_info);
enum radv_rt_lowering_mode {
RADV_RT_LOWERING_MODE_MONOLITHIC,