fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 09:38:07 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

nir: lower 64-bit floats to 32-bit first.

Browse source 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9643>
This commit is contained in:
Dave Airlie 2021-03-10 16:19:32 +10:00
parent 01dfd65a2d
commit 48080e5bdf
1 changed files with 3 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/compiler/nir/nir_lower_fp16_conv.c
View file

@ -90,6 +90,9 @@ float_to_half_impl(nir_builder *b, nir_ssa_def *src, nir_rounding_mode mode)
{
nir_ssa_def *f32infinity = nir_imm_int(b, 255 << 23);
nir_ssa_def *f16max = nir_imm_int(b, (127 + 16) << 23);
if (src->bit_size == 64)
src = nir_f2f32(b, src);
nir_ssa_def *sign = nir_iand(b, src, nir_imm_int(b, 0x80000000));
nir_ssa_def *one = nir_imm_int(b, 1);
@ -197,7 +200,6 @@ lower_fp16_cast_impl(nir_builder *b, nir_instr *instr, void *data)
src = alu->src[0].src.ssa;
swizzle = alu->src[0].swizzle;
dst = &alu->dest.dest.ssa;
assert(src->bit_size == 32);
switch (alu->op) {
case nir_op_f2f16:
case nir_op_f2f16_rtne: