diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index e78c1aea241..b9de912f442 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -1556,7 +1556,7 @@ emit_load_const(struct ntv_context *ctx, nir_load_const_instr *load_const)
 }
 
 static void
-emit_load_ubo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
+emit_load_ubo_vec4(struct ntv_context *ctx, nir_intrinsic_instr *intr)
 {
    ASSERTED nir_const_value *const_block_index = nir_src_as_const_value(intr->src[0]);
    assert(const_block_index); // no dynamic indexing for now
@@ -1569,8 +1569,7 @@ emit_load_ubo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
                                                       SpvStorageClassUniform,
                                                       uvec4_type);
 
-      assert(const_offset->u32 % 16 == 0);
-      unsigned idx = const_offset->u32 / 16;
+      unsigned idx = const_offset->u32;
       SpvId member = emit_uint_const(ctx, 32, 0);
       SpvId offset = emit_uint_const(ctx, 32, idx);
       SpvId offsets[] = { member, offset };
@@ -1715,8 +1714,8 @@ static void
 emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
 {
    switch (intr->intrinsic) {
-   case nir_intrinsic_load_ubo:
-      emit_load_ubo(ctx, intr);
+   case nir_intrinsic_load_ubo_vec4:
+      emit_load_ubo_vec4(ctx, intr);
       break;
 
    case nir_intrinsic_discard:
diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c
index 3490b2bea99..87b9a785cef 100644
--- a/src/gallium/drivers/zink/zink_compiler.c
+++ b/src/gallium/drivers/zink/zink_compiler.c
@@ -264,6 +264,7 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir,
     */
    if (nir->num_uniforms)
       NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 16);
+   NIR_PASS_V(nir, nir_lower_ubo_vec4);
    NIR_PASS_V(nir, nir_lower_clip_halfz);
    if (nir->info.stage == MESA_SHADER_VERTEX)
       have_psiz = check_psiz(nir);