i965: Add a cache_coherent field to brw_bo

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

src/mesa/drivers/dri/i965/brw_bufmgr.c

@@ -351,6 +351,7 @@ retry:
    bo->name = name;
    p_atomic_set(&bo->refcount, 1);
    bo->reusable = true;
+   bo->cache_coherent = bufmgr->has_llc;
 
    pthread_mutex_unlock(&bufmgr->lock);
 

src/mesa/drivers/dri/i965/brw_bufmgr.h

@@ -123,6 +123,11 @@ struct brw_bo {
     * Boolean of whether this buffer can be re-used
     */
    bool reusable;
+
+   /**
+    * Boolean of whether this buffer is cache coherent
+    */
+   bool cache_coherent;
 };
 
 #define BO_ALLOC_FOR_RENDER (1<<0)

src/mesa/drivers/dri/i965/intel_mipmap_tree.c

@@ -628,6 +628,9 @@ miptree_create(struct brw_context *brw,
                                   alloc_flags);
    }
 
+   if (layout_flags & MIPTREE_LAYOUT_FOR_SCANOUT)
+      mt->bo->cache_coherent = false;
+
    return mt;
 }