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Treewide: Remove Elements() macro

Browse source 
Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
This commit is contained in:
Jan Vesely 2016-05-17 09:25:44 -04:00 • committed by Jan Vesely
parent 322cd2457c
commit 47b390fe45
42 changed files with 141 additions and 149 deletions
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2
src/gallium/auxiliary/pipe-loader/pipe_loader.c
View file

@ -51,7 +51,7 @@ pipe_loader_probe(struct pipe_loader_device **devs, int ndev)
{
int i, n = 0;
for (i = 0; i < Elements(backends); i++)
for (i = 0; i < ARRAY_SIZE(backends); i++)
n += backends[i](&devs[n], MAX2(0, ndev - n));
return n;

8
src/gallium/auxiliary/util/u_memory.h
View file

@ -77,14 +77,6 @@ mem_dup(const void *src, uint size)
}
/**
* Number of elements in an array.
*/
#ifndef Elements
#define Elements(x) (sizeof(x)/sizeof((x)[0]))
#endif
/**
* Offset of a field in a struct, in bytes.
*/

24
src/gallium/auxiliary/vl/vl_mpeg12_bitstream.c
View file

@ -597,18 +597,18 @@ init_dct_coeff_table(struct dct_coeff *dst, const struct dct_coeff_compressed *s
static inline void
init_tables()
{
vl_vlc_init_table(tbl_B1, Elements(tbl_B1), macroblock_address_increment, Elements(macroblock_address_increment));
vl_vlc_init_table(tbl_B2, Elements(tbl_B2), macroblock_type_i, Elements(macroblock_type_i));
vl_vlc_init_table(tbl_B3, Elements(tbl_B3), macroblock_type_p, Elements(macroblock_type_p));
vl_vlc_init_table(tbl_B4, Elements(tbl_B4), macroblock_type_b, Elements(macroblock_type_b));
vl_vlc_init_table(tbl_B9, Elements(tbl_B9), coded_block_pattern, Elements(coded_block_pattern));
vl_vlc_init_table(tbl_B10, Elements(tbl_B10), motion_code, Elements(motion_code));
vl_vlc_init_table(tbl_B11, Elements(tbl_B11), dmvector, Elements(dmvector));
vl_vlc_init_table(tbl_B12, Elements(tbl_B12), dct_dc_size_luminance, Elements(dct_dc_size_luminance));
vl_vlc_init_table(tbl_B13, Elements(tbl_B13), dct_dc_size_chrominance, Elements(dct_dc_size_chrominance));
init_dct_coeff_table(tbl_B14_DC, dct_coeff_tbl_zero, Elements(dct_coeff_tbl_zero), true);
init_dct_coeff_table(tbl_B14_AC, dct_coeff_tbl_zero, Elements(dct_coeff_tbl_zero), false);
init_dct_coeff_table(tbl_B15, dct_coeff_tbl_one, Elements(dct_coeff_tbl_one), false);
vl_vlc_init_table(tbl_B1, ARRAY_SIZE(tbl_B1), macroblock_address_increment, ARRAY_SIZE(macroblock_address_increment));
vl_vlc_init_table(tbl_B2, ARRAY_SIZE(tbl_B2), macroblock_type_i, ARRAY_SIZE(macroblock_type_i));
vl_vlc_init_table(tbl_B3, ARRAY_SIZE(tbl_B3), macroblock_type_p, ARRAY_SIZE(macroblock_type_p));
vl_vlc_init_table(tbl_B4, ARRAY_SIZE(tbl_B4), macroblock_type_b, ARRAY_SIZE(macroblock_type_b));
vl_vlc_init_table(tbl_B9, ARRAY_SIZE(tbl_B9), coded_block_pattern, ARRAY_SIZE(coded_block_pattern));
vl_vlc_init_table(tbl_B10, ARRAY_SIZE(tbl_B10), motion_code, ARRAY_SIZE(motion_code));
vl_vlc_init_table(tbl_B11, ARRAY_SIZE(tbl_B11), dmvector, ARRAY_SIZE(dmvector));
vl_vlc_init_table(tbl_B12, ARRAY_SIZE(tbl_B12), dct_dc_size_luminance, ARRAY_SIZE(dct_dc_size_luminance));
vl_vlc_init_table(tbl_B13, ARRAY_SIZE(tbl_B13), dct_dc_size_chrominance, ARRAY_SIZE(dct_dc_size_chrominance));
init_dct_coeff_table(tbl_B14_DC, dct_coeff_tbl_zero, ARRAY_SIZE(dct_coeff_tbl_zero), true);
init_dct_coeff_table(tbl_B14_AC, dct_coeff_tbl_zero, ARRAY_SIZE(dct_coeff_tbl_zero), false);
init_dct_coeff_table(tbl_B15, dct_coeff_tbl_one, ARRAY_SIZE(dct_coeff_tbl_one), false);
}
static inline int

2
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
View file

@ -2472,7 +2472,7 @@ MemoryOpt::replaceStFromSt(Instruction *restrict st, Record *rec)
// get non-replaced sources after values covered by st
for (; offR < endR; offR += ri->getSrc(s)->reg.size, ++s)
vals[k++] = ri->getSrc(s);
assert((unsigned int)k <= Elements(vals));
assert((unsigned int)k <= ARRAY_SIZE(vals));
for (s = 0; s < k; ++s)
st->setSrc(s + 1, vals[s]);
st->setSrc(0, ri->getSrc(0));

6
src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
View file

@ -547,16 +547,16 @@ void Instruction::print() const
switch (op) {
case OP_SUREDP:
case OP_ATOM:
if (subOp < Elements(atomSubOpStr))
if (subOp < ARRAY_SIZE(atomSubOpStr))
PRINT("%s ", atomSubOpStr[subOp]);
break;
case OP_LOAD:
case OP_STORE:
if (subOp < Elements(ldstSubOpStr))
if (subOp < ARRAY_SIZE(ldstSubOpStr))
PRINT("%s ", ldstSubOpStr[subOp]);
break;
case OP_SUBFM:
if (subOp < Elements(subfmOpStr))
if (subOp < ARRAY_SIZE(subfmOpStr))
PRINT("%s ", subfmOpStr[subOp]);
break;
default:

4
src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp
View file

@ -145,8 +145,8 @@ extern Target *getTargetNV50(unsigned int chipset);
Target *Target::create(unsigned int chipset)
{
STATIC_ASSERT(Elements(operationSrcNr) == OP_LAST + 1);
STATIC_ASSERT(Elements(operationClass) == OP_LAST + 1);
STATIC_ASSERT(ARRAY_SIZE(operationSrcNr) == OP_LAST + 1);
STATIC_ASSERT(ARRAY_SIZE(operationClass) == OP_LAST + 1);
switch (chipset & ~0xf) {
case 0x110:
case 0x120:

2
src/gallium/drivers/nouveau/nouveau_compiler.c
View file

@ -197,7 +197,7 @@ main(int argc, char *argv[])
return 1;
}
if (!tgsi_text_translate(text, tokens, Elements(tokens))) {
if (!tgsi_text_translate(text, tokens, ARRAY_SIZE(tokens))) {
_debug_printf("Failed to parse TGSI shader\n");
return 1;
}

4
src/gallium/drivers/nouveau/nv50/nv50_tex.c
View file

@ -449,6 +449,6 @@ void nv50_upload_ms_info(struct nouveau_pushbuf *push)
{
BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
PUSH_DATA (push, (NV50_CB_AUX_MS_OFFSET << (8 - 2)) | NV50_CB_AUX);
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), Elements(msaa_sample_xy_offsets));
PUSH_DATAp(push, msaa_sample_xy_offsets, Elements(msaa_sample_xy_offsets));
BEGIN_NI04(push, NV50_3D(CB_DATA(0)), ARRAY_SIZE(msaa_sample_xy_offsets));
PUSH_DATAp(push, msaa_sample_xy_offsets, ARRAY_SIZE(msaa_sample_xy_offsets));
}

2
src/gallium/drivers/r300/r300_chipset.c
View file

@ -53,7 +53,7 @@ static void r300_apply_hyperz_blacklist(struct r300_capabilities* caps)
if (!os_get_process_name(proc_name, sizeof(proc_name)))
return;
for (i = 0; i < Elements(list); i++) {
for (i = 0; i < ARRAY_SIZE(list); i++) {
if (strcmp(list[i], proc_name) == 0) {
caps->zmask_ram = 0;
caps->hiz_ram = 0;

8
src/gallium/drivers/r300/r300_vs_draw.c
View file

@ -112,7 +112,7 @@ static void insert_output_before(struct tgsi_transform_context *ctx,
unsigned i;
/* Make a place for the new output. */
for (i = before->Range.First; i < Elements(vsctx->out_remap); i++) {
for (i = before->Range.First; i < ARRAY_SIZE(vsctx->out_remap); i++) {
++vsctx->out_remap[i];
}
@ -131,7 +131,7 @@ static void insert_output_after(struct tgsi_transform_context *ctx,
unsigned i;
/* Make a place for the new output. */
for (i = after->Range.First+1; i < Elements(vsctx->out_remap); i++) {
for (i = after->Range.First+1; i < ARRAY_SIZE(vsctx->out_remap); i++) {
++vsctx->out_remap[i];
}
@ -234,7 +234,7 @@ static void transform_inst(struct tgsi_transform_context *ctx,
TGSI_INTERPOLATE_PERSPECTIVE, vsctx->num_outputs);
/* Find a free temp for POSITION. */
for (i = 0; i < Elements(vsctx->temp_used); i++) {
for (i = 0; i < ARRAY_SIZE(vsctx->temp_used); i++) {
if (!vsctx->temp_used[i]) {
emit_temp(ctx, i);
vsctx->pos_temp = i;
@ -325,7 +325,7 @@ void r300_draw_init_vertex_shader(struct r300_context *r300,
return;
memset(&transform, 0, sizeof(transform));
for (i = 0; i < Elements(transform.out_remap); i++) {
for (i = 0; i < ARRAY_SIZE(transform.out_remap); i++) {
transform.out_remap[i] = i;
}
transform.last_generic = -1;

12
src/gallium/drivers/r600/evergreen_state.c
View file

@ -1504,18 +1504,18 @@ static void evergreen_emit_msaa_state(struct r600_context *rctx, int nr_samples,
nr_samples = 0;
break;
case 2:
radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(eg_sample_locs_2x));
radeon_emit_array(cs, eg_sample_locs_2x, Elements(eg_sample_locs_2x));
radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, ARRAY_SIZE(eg_sample_locs_2x));
radeon_emit_array(cs, eg_sample_locs_2x, ARRAY_SIZE(eg_sample_locs_2x));
max_dist = eg_max_dist_2x;
break;
case 4:
radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(eg_sample_locs_4x));
radeon_emit_array(cs, eg_sample_locs_4x, Elements(eg_sample_locs_4x));
radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, ARRAY_SIZE(eg_sample_locs_4x));
radeon_emit_array(cs, eg_sample_locs_4x, ARRAY_SIZE(eg_sample_locs_4x));
max_dist = eg_max_dist_4x;
break;
case 8:
radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, Elements(sample_locs_8x));
radeon_emit_array(cs, sample_locs_8x, Elements(sample_locs_8x));
radeon_set_context_reg_seq(cs, R_028C1C_PA_SC_AA_SAMPLE_LOCS_0, ARRAY_SIZE(sample_locs_8x));
radeon_emit_array(cs, sample_locs_8x, ARRAY_SIZE(sample_locs_8x));
max_dist = max_dist_8x;
break;
}

10
src/gallium/drivers/r600/r600_shader.c
View file

@ -858,7 +858,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
case TGSI_FILE_INPUT:
for (j = 0; j < count; j++) {
i = ctx->shader->ninput + j;
assert(i < Elements(ctx->shader->input));
assert(i < ARRAY_SIZE(ctx->shader->input));
ctx->shader->input[i].name = d->Semantic.Name;
ctx->shader->input[i].sid = d->Semantic.Index + j;
ctx->shader->input[i].interpolate = d->Interp.Interpolate;
@ -902,7 +902,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
case TGSI_FILE_OUTPUT:
for (j = 0; j < count; j++) {
i = ctx->shader->noutput + j;
assert(i < Elements(ctx->shader->output));
assert(i < ARRAY_SIZE(ctx->shader->output));
ctx->shader->output[i].name = d->Semantic.Name;
ctx->shader->output[i].sid = d->Semantic.Index + j;
ctx->shader->output[i].gpr = ctx->file_offset[TGSI_FILE_OUTPUT] + d->Range.First + j;
@ -1117,7 +1117,7 @@ static int allocate_system_value_inputs(struct r600_shader_ctx *ctx, int gpr_off
} else if (parse.FullToken.Token.Type == TGSI_TOKEN_TYPE_DECLARATION) {
struct tgsi_full_declaration *d = &parse.FullToken.FullDeclaration;
if (d->Declaration.File == TGSI_FILE_SYSTEM_VALUE) {
for (k = 0; k < Elements(inputs); k++) {
for (k = 0; k < ARRAY_SIZE(inputs); k++) {
if (d->Semantic.Name == inputs[k].name ||
d->Semantic.Name == inputs[k].alternate_name) {
inputs[k].enabled = true;
@ -1129,7 +1129,7 @@ static int allocate_system_value_inputs(struct r600_shader_ctx *ctx, int gpr_off
tgsi_parse_free(&parse);
for (i = 0; i < Elements(inputs); i++) {
for (i = 0; i < ARRAY_SIZE(inputs); i++) {
boolean enabled = inputs[i].enabled;
int *reg = inputs[i].reg;
unsigned name = inputs[i].name;
@ -1217,7 +1217,7 @@ static int evergreen_gpr_count(struct r600_shader_ctx *ctx)
/* assign gpr to each interpolator according to priority */
num_baryc = 0;
for (i = 0; i < Elements(ctx->eg_interpolators); i++) {
for (i = 0; i < ARRAY_SIZE(ctx->eg_interpolators); i++) {
if (ctx->eg_interpolators[i].enabled) {
ctx->eg_interpolators[i].ij_index = num_baryc;
num_baryc ++;

6
src/gallium/drivers/r600/r600_state_common.c
View file

@ -121,7 +121,7 @@ static unsigned r600_conv_pipe_prim(unsigned prim)
[PIPE_PRIM_PATCHES] = V_008958_DI_PT_PATCH,
[R600_PRIM_RECTANGLE_LIST] = V_008958_DI_PT_RECTLIST
};
assert(prim < Elements(prim_conv));
assert(prim < ARRAY_SIZE(prim_conv));
return prim_conv[prim];
}
@ -145,7 +145,7 @@ unsigned r600_conv_prim_to_gs_out(unsigned mode)
[PIPE_PRIM_PATCHES] = V_028A6C_OUTPRIM_TYPE_POINTLIST,
[R600_PRIM_RECTANGLE_LIST] = V_028A6C_OUTPRIM_TYPE_TRISTRIP
};
assert(mode < Elements(prim_conv));
assert(mode < ARRAY_SIZE(prim_conv));
return prim_conv[mode];
}
@ -1283,7 +1283,7 @@ void r600_set_sample_locations_constant_buffer(struct r600_context *rctx)
struct pipe_context *ctx = &rctx->b.b;
assert(rctx->framebuffer.nr_samples < R600_UCP_SIZE);
assert(rctx->framebuffer.nr_samples <= Elements(rctx->sample_positions)/4);
assert(rctx->framebuffer.nr_samples <= ARRAY_SIZE(rctx->sample_positions)/4);
memset(rctx->sample_positions, 0, 4 * 4 * 16);
for (i = 0; i < rctx->framebuffer.nr_samples; i++) {

2
src/gallium/drivers/r600/sb/sb_bc_parser.cpp
View file

@ -176,7 +176,7 @@ int bc_parser::parse_decls() {
if (ps_interp) {
/* add the egcm ij interpolators to live inputs */
unsigned num_ij = 0;
for (unsigned i = 0; i < Elements(ij_interpolators); i++) {
for (unsigned i = 0; i < ARRAY_SIZE(ij_interpolators); i++) {
num_ij += ij_interpolators[i];
}

6
src/gallium/drivers/radeon/r600_query.c
View file

@ -1174,11 +1174,11 @@ static struct pipe_driver_query_info r600_driver_query_list[] = {
static unsigned r600_get_num_queries(struct r600_common_screen *rscreen)
{
if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 42)
return Elements(r600_driver_query_list);
return ARRAY_SIZE(r600_driver_query_list);
else if (rscreen->info.drm_major == 3)
return Elements(r600_driver_query_list) - 3;
return ARRAY_SIZE(r600_driver_query_list) - 3;
else
return Elements(r600_driver_query_list) - 4;
return ARRAY_SIZE(r600_driver_query_list) - 4;
}
static int r600_get_driver_query_info(struct pipe_screen *screen,

2
src/gallium/drivers/radeon/r600_texture.c
View file

@ -313,7 +313,7 @@ static int r600_setup_surface(struct pipe_screen *screen,
}
if (offset) {
for (i = 0; i < Elements(rtex->surface.level); ++i)
for (i = 0; i < ARRAY_SIZE(rtex->surface.level); ++i)
rtex->surface.level[i].offset += offset;
}
return 0;

4
src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c
View file

@ -1341,7 +1341,7 @@ static void emit_lsb(const struct lp_build_tgsi_action * action,
emit_data->output[emit_data->chan] =
lp_build_intrinsic(gallivm->builder, "llvm.cttz.i32",
emit_data->dst_type, args, Elements(args),
emit_data->dst_type, args, ARRAY_SIZE(args),
LLVMReadNoneAttribute);
}
@ -1360,7 +1360,7 @@ static void emit_umsb(const struct lp_build_tgsi_action * action,
LLVMValueRef msb =
lp_build_intrinsic(builder, "llvm.ctlz.i32",
emit_data->dst_type, args, Elements(args),
emit_data->dst_type, args, ARRAY_SIZE(args),
LLVMReadNoneAttribute);
/* The HW returns the last bit index from MSB, but TGSI wants

2
src/gallium/drivers/radeon/radeon_video.c
View file

@ -165,7 +165,7 @@ void rvid_join_surfaces(struct radeon_winsys* ws,
/* adjust the texture layer offsets */
off = align(off, surfaces[i]->bo_alignment);
for (j = 0; j < Elements(surfaces[i]->level); ++j)
for (j = 0; j < ARRAY_SIZE(surfaces[i]->level); ++j)
surfaces[i]->level[j].offset += off;
off += surfaces[i]->bo_size;
}

8
src/gallium/drivers/radeonsi/si_descriptors.c
View file

@ -254,7 +254,7 @@ static void si_release_sampler_views(struct si_sampler_views *views)
{
int i;
for (i = 0; i < Elements(views->views); i++) {
for (i = 0; i < ARRAY_SIZE(views->views); i++) {
pipe_sampler_view_reference(&views->views[i], NULL);
}
si_release_descriptors(&views->desc);
@ -673,7 +673,7 @@ static void si_vertex_buffers_begin_new_cs(struct si_context *sctx)
for (i = 0; i < count; i++) {
int vb = sctx->vertex_elements->elements[i].vertex_buffer_index;
if (vb >= Elements(sctx->vertex_buffer))
if (vb >= ARRAY_SIZE(sctx->vertex_buffer))
continue;
if (!sctx->vertex_buffer[vb].buffer)
continue;
@ -725,7 +725,7 @@ static bool si_upload_vertex_buffer_descriptors(struct si_context *sctx)
unsigned offset;
uint32_t *desc = &ptr[i*4];
if (ve->vertex_buffer_index >= Elements(sctx->vertex_buffer)) {
if (ve->vertex_buffer_index >= ARRAY_SIZE(sctx->vertex_buffer)) {
memset(desc, 0, 16);
continue;
}
@ -1219,7 +1219,7 @@ static void si_invalidate_buffer(struct pipe_context *ctx, struct pipe_resource
for (i = 0; i < num_elems; i++) {
int vb = sctx->vertex_elements->elements[i].vertex_buffer_index;
if (vb >= Elements(sctx->vertex_buffer))
if (vb >= ARRAY_SIZE(sctx->vertex_buffer))
continue;
if (!sctx->vertex_buffer[vb].buffer)
continue;

2
src/gallium/drivers/radeonsi/si_pipe.c
View file

@ -58,7 +58,7 @@ static void si_destroy_context(struct pipe_context *context)
si_pm4_free_state(sctx, sctx->init_config, ~0);
if (sctx->init_config_gs_rings)
si_pm4_free_state(sctx, sctx->init_config_gs_rings, ~0);
for (i = 0; i < Elements(sctx->vgt_shader_config); i++)
for (i = 0; i < ARRAY_SIZE(sctx->vgt_shader_config); i++)
si_pm4_delete_state(sctx, vgt_shader_config, sctx->vgt_shader_config[i]);
if (sctx->fixed_func_tcs_shader.cso)

6
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -1876,7 +1876,7 @@ static void build_tbuffer_store(struct si_shader_context *ctx,
snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
lp_build_intrinsic(gallivm->builder, name, ctx->voidt,
args, Elements(args), 0);
args, ARRAY_SIZE(args), 0);
}
static void build_tbuffer_store_dwords(struct si_shader_context *ctx,
@ -5155,7 +5155,7 @@ static void create_function(struct si_shader_context *ctx)
return;
}
assert(num_params <= Elements(params));
assert(num_params <= ARRAY_SIZE(params));
si_create_function(ctx, returns, num_returns, params,
num_params, last_array_pointer, last_sgpr);
@ -5918,7 +5918,7 @@ void si_dump_shader_key(unsigned shader, union si_shader_key *key, FILE *f)
switch (shader) {
case PIPE_SHADER_VERTEX:
fprintf(f, " instance_divisors = {");
for (i = 0; i < Elements(key->vs.prolog.instance_divisors); i++)
for (i = 0; i < ARRAY_SIZE(key->vs.prolog.instance_divisors); i++)
fprintf(f, !i ? "%u" : ", %u",
key->vs.prolog.instance_divisors[i]);
fprintf(f, "}\n");

2
src/gallium/drivers/radeonsi/si_state.c
View file

@ -3179,7 +3179,7 @@ static void si_set_vertex_buffers(struct pipe_context *ctx,
struct pipe_vertex_buffer *dst = sctx->vertex_buffer + start_slot;
int i;
assert(start_slot + count <= Elements(sctx->vertex_buffer));
assert(start_slot + count <= ARRAY_SIZE(sctx->vertex_buffer));
if (buffers) {
for (i = 0; i < count; i++) {

4
src/gallium/drivers/radeonsi/si_state_draw.c
View file

@ -54,7 +54,7 @@ static unsigned si_conv_pipe_prim(unsigned mode)
[PIPE_PRIM_PATCHES] = V_008958_DI_PT_PATCH,
[R600_PRIM_RECTANGLE_LIST] = V_008958_DI_PT_RECTLIST
};
assert(mode < Elements(prim_conv));
assert(mode < ARRAY_SIZE(prim_conv));
return prim_conv[mode];
}
@ -78,7 +78,7 @@ static unsigned si_conv_prim_to_gs_out(unsigned mode)
[PIPE_PRIM_PATCHES] = V_028A6C_OUTPRIM_TYPE_POINTLIST,
[R600_PRIM_RECTANGLE_LIST] = V_028A6C_OUTPRIM_TYPE_TRISTRIP
};
assert(mode < Elements(prim_conv));
assert(mode < ARRAY_SIZE(prim_conv));
return prim_conv[mode];
}

2
src/gallium/state_trackers/clover/tgsi/compiler.cpp
View file

@ -83,7 +83,7 @@ namespace {
read_body(const char *source, module &m, std::string &r_log) {
tgsi_token prog[1024];
if (!tgsi_text_translate(source, prog, Elements(prog))) {
if (!tgsi_text_translate(source, prog, ARRAY_SIZE(prog))) {
r_log = "translate failed";
throw compile_error();
}

10
src/gallium/state_trackers/nine/device9.c
View file

@ -2659,8 +2659,8 @@ NineDevice9_GetTextureStageState( struct NineDevice9 *This,
{
const struct nine_state *state = &This->state;
user_assert(Stage < Elements(state->ff.tex_stage), D3DERR_INVALIDCALL);
user_assert(Type < Elements(state->ff.tex_stage[0]), D3DERR_INVALIDCALL);
user_assert(Stage < ARRAY_SIZE(state->ff.tex_stage), D3DERR_INVALIDCALL);
user_assert(Type < ARRAY_SIZE(state->ff.tex_stage[0]), D3DERR_INVALIDCALL);
*pValue = state->ff.tex_stage[Stage][Type];
@ -2679,8 +2679,8 @@ NineDevice9_SetTextureStageState( struct NineDevice9 *This,
DBG("Stage=%u Type=%u Value=%08x\n", Stage, Type, Value);
nine_dump_D3DTSS_value(DBG_FF, Type, Value);
user_assert(Stage < Elements(state->ff.tex_stage), D3DERR_INVALIDCALL);
user_assert(Type < Elements(state->ff.tex_stage[0]), D3DERR_INVALIDCALL);
user_assert(Stage < ARRAY_SIZE(state->ff.tex_stage), D3DERR_INVALIDCALL);
user_assert(Type < ARRAY_SIZE(state->ff.tex_stage[0]), D3DERR_INVALIDCALL);
state->ff.tex_stage[Stage][Type] = Value;
switch (Type) {
@ -2776,7 +2776,7 @@ NineDevice9_ValidateDevice( struct NineDevice9 *This,
DBG("This=%p pNumPasses=%p\n", This, pNumPasses);
for (i = 0; i < Elements(state->samp); ++i) {
for (i = 0; i < ARRAY_SIZE(state->samp); ++i) {
if (state->samp[i][D3DSAMP_MINFILTER] == D3DTEXF_NONE ||
state->samp[i][D3DSAMP_MAGFILTER] == D3DTEXF_NONE)
return D3DERR_UNSUPPORTEDTEXTUREFILTER;

6
src/gallium/state_trackers/nine/nine_ff.c
View file

@ -126,7 +126,7 @@ static unsigned nine_ff_vs_key_hash(void *key)
struct nine_ff_vs_key *vs = key;
unsigned i;
uint32_t hash = vs->value32[0];
for (i = 1; i < Elements(vs->value32); ++i)
for (i = 1; i < ARRAY_SIZE(vs->value32); ++i)
hash ^= vs->value32[i];
return hash;
}
@ -142,7 +142,7 @@ static unsigned nine_ff_ps_key_hash(void *key)
struct nine_ff_ps_key *ps = key;
unsigned i;
uint32_t hash = ps->value32[0];
for (i = 1; i < Elements(ps->value32); ++i)
for (i = 1; i < ARRAY_SIZE(ps->value32); ++i)
hash ^= ps->value32[i];
return hash;
}
@ -1225,7 +1225,7 @@ nine_ff_build_ps(struct NineDevice9 *device, struct nine_ff_ps_key *key)
ps.vC[0] = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_COLOR, 0, TGSI_INTERPOLATE_COLOR);
/* Declare all TEMPs we might need, serious drivers have a register allocator. */
for (i = 0; i < Elements(ps.r); ++i)
for (i = 0; i < ARRAY_SIZE(ps.r); ++i)
ps.r[i] = ureg_DECL_local_temporary(ureg);
ps.rCur = ps.r[0];
ps.rTmp = ps.r[1];

64
src/gallium/state_trackers/nine/nine_shader.c
View file

@ -411,12 +411,12 @@ sm1_dump_instruction(struct sm1_instruction *insn, unsigned indent)
DUMP("_co");
DUMP(" ");
for (i = 0; i < insn->ndst && i < Elements(insn->dst); ++i) {
for (i = 0; i < insn->ndst && i < ARRAY_SIZE(insn->dst); ++i) {
sm1_dump_dst_param(&insn->dst[i]);
DUMP(" ");
}
for (i = 0; i < insn->nsrc && i < Elements(insn->src); ++i) {
for (i = 0; i < insn->nsrc && i < ARRAY_SIZE(insn->src); ++i) {
sm1_dump_src_param(&insn->src[i]);
DUMP(" ");
}
@ -490,7 +490,7 @@ struct shader_translator
struct ureg_src vT[8]; /* PS texcoord in */
struct ureg_dst rL[NINE_MAX_LOOP_DEPTH]; /* loop ctr */
} regs;
unsigned num_temp; /* Elements(regs.r) */
unsigned num_temp; /* ARRAY_SIZE(regs.r) */
unsigned num_scratch;
unsigned loop_depth;
unsigned loop_depth_max;
@ -622,7 +622,7 @@ tx_set_lconstb(struct shader_translator *tx, INT index, BOOL b)
static inline struct ureg_dst
tx_scratch(struct shader_translator *tx)
{
if (tx->num_scratch >= Elements(tx->regs.t)) {
if (tx->num_scratch >= ARRAY_SIZE(tx->regs.t)) {
tx->failure = TRUE;
return tx->regs.t[0];
}
@ -735,7 +735,7 @@ static inline void
tx_texcoord_alloc(struct shader_translator *tx, INT idx)
{
assert(IS_PS);
assert(idx >= 0 && idx < Elements(tx->regs.vT));
assert(idx >= 0 && idx < ARRAY_SIZE(tx->regs.vT));
if (ureg_src_is_undef(tx->regs.vT[idx]))
tx->regs.vT[idx] = ureg_DECL_fs_input(tx->ureg, tx->texcoord_sn, idx,
TGSI_INTERPOLATE_PERSPECTIVE);
@ -895,7 +895,7 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
0, 1);
} else {
assert(!param->rel); /* TODO */
assert(param->idx < Elements(tx->regs.v));
assert(param->idx < ARRAY_SIZE(tx->regs.v));
src = tx->regs.v[param->idx];
}
}
@ -1165,7 +1165,7 @@ _tx_dst_param(struct shader_translator *tx, const struct sm1_dst_param *param)
dst = ureg_DECL_output(tx->ureg, tx->texcoord_sn, param->idx);
} else {
assert(!param->rel); /* TODO */
assert(param->idx < Elements(tx->regs.o));
assert(param->idx < ARRAY_SIZE(tx->regs.o));
dst = tx->regs.o[param->idx];
}
break;
@ -1262,7 +1262,7 @@ tx_dst_param_as_src(struct shader_translator *tx, const struct sm1_dst_param *pa
src = ureg_src_register(TGSI_FILE_INPUT, param->idx);
} else {
assert(!param->rel);
assert(param->idx < Elements(tx->regs.v));
assert(param->idx < ARRAY_SIZE(tx->regs.v));
src = tx->regs.v[param->idx];
}
break;
@ -1437,7 +1437,7 @@ d3dsio_to_string( unsigned opcode )
"BREAKP"
};
if (opcode < Elements(names)) return names[opcode];
if (opcode < ARRAY_SIZE(names)) return names[opcode];
switch (opcode) {
case D3DSIO_PHASE: return "PHASE";
@ -2030,7 +2030,7 @@ DECL_SPECIAL(DCL)
if (is_input) {
/* linkage outside of shader with vertex declaration */
ureg_DECL_vs_input(ureg, sem.reg.idx);
assert(sem.reg.idx < Elements(tx->info->input_map));
assert(sem.reg.idx < ARRAY_SIZE(tx->info->input_map));
tx->info->input_map[sem.reg.idx] = sm1_to_nine_declusage(&sem);
tx->info->num_inputs = sem.reg.idx + 1;
/* NOTE: preserving order in case of indirect access */
@ -2040,7 +2040,7 @@ DECL_SPECIAL(DCL)
assert(sem.reg.mask != 0);
if (sem.usage == D3DDECLUSAGE_POSITIONT)
tx->info->position_t = TRUE;
assert(sem.reg.idx < Elements(tx->regs.o));
assert(sem.reg.idx < ARRAY_SIZE(tx->regs.o));
tx->regs.o[sem.reg.idx] = ureg_DECL_output_masked(
ureg, tgsi.Name, tgsi.Index, sem.reg.mask, 0, 1);
@ -2051,7 +2051,7 @@ DECL_SPECIAL(DCL)
if (is_input && tx->version.major >= 3) {
unsigned interp_location = 0;
/* SM3 only, SM2 input semantic determined by file */
assert(sem.reg.idx < Elements(tx->regs.v));
assert(sem.reg.idx < ARRAY_SIZE(tx->regs.v));
if (tgsi.Name == TGSI_SEMANTIC_POSITION) {
tx->regs.v[sem.reg.idx] = nine_get_position_input(tx);
@ -2624,7 +2624,7 @@ DECL_SPECIAL(TEXLD)
tx_src_param(tx, &tx->insn.src[1])
};
assert(tx->insn.src[1].idx >= 0 &&
tx->insn.src[1].idx < Elements(tx->sampler_targets));
tx->insn.src[1].idx < ARRAY_SIZE(tx->sampler_targets));
target = tx->sampler_targets[tx->insn.src[1].idx];
switch (tx->insn.flags) {
@ -2688,7 +2688,7 @@ DECL_SPECIAL(TEXLDD)
tx_src_param(tx, &tx->insn.src[3])
};
assert(tx->insn.src[1].idx >= 0 &&
tx->insn.src[1].idx < Elements(tx->sampler_targets));
tx->insn.src[1].idx < ARRAY_SIZE(tx->sampler_targets));
target = tx->sampler_targets[tx->insn.src[1].idx];
ureg_TXD(tx->ureg, dst, target, src[0], src[2], src[3], src[1]);
@ -2704,7 +2704,7 @@ DECL_SPECIAL(TEXLDL)
tx_src_param(tx, &tx->insn.src[1])
};
assert(tx->insn.src[1].idx >= 0 &&
tx->insn.src[1].idx < Elements(tx->sampler_targets));
tx->insn.src[1].idx < ARRAY_SIZE(tx->sampler_targets));
target = tx->sampler_targets[tx->insn.src[1].idx];
ureg_TXL(tx->ureg, dst, target, src[0], src[1]);
@ -2854,19 +2854,19 @@ create_op_info_map(struct shader_translator *tx)
const unsigned version = (tx->version.major << 8) | tx->version.minor;
unsigned i;
for (i = 0; i < Elements(tx->op_info_map); ++i)
for (i = 0; i < ARRAY_SIZE(tx->op_info_map); ++i)
tx->op_info_map[i] = -1;
if (tx->processor == PIPE_SHADER_VERTEX) {
for (i = 0; i < Elements(inst_table); ++i) {
assert(inst_table[i].sio < Elements(tx->op_info_map));
for (i = 0; i < ARRAY_SIZE(inst_table); ++i) {
assert(inst_table[i].sio < ARRAY_SIZE(tx->op_info_map));
if (inst_table[i].vert_version.min <= version &&
inst_table[i].vert_version.max >= version)
tx->op_info_map[inst_table[i].sio] = i;
}
} else {
for (i = 0; i < Elements(inst_table); ++i) {
assert(inst_table[i].sio < Elements(tx->op_info_map));
for (i = 0; i < ARRAY_SIZE(inst_table); ++i) {
assert(inst_table[i].sio < ARRAY_SIZE(tx->op_info_map));
if (inst_table[i].frag_version.min <= version &&
inst_table[i].frag_version.max >= version)
tx->op_info_map[inst_table[i].sio] = i;
@ -2881,9 +2881,9 @@ NineTranslateInstruction_Generic(struct shader_translator *tx)
struct ureg_src src[4];
unsigned i;
for (i = 0; i < tx->insn.ndst && i < Elements(dst); ++i)
for (i = 0; i < tx->insn.ndst && i < ARRAY_SIZE(dst); ++i)
dst[i] = tx_dst_param(tx, &tx->insn.dst[i]);
for (i = 0; i < tx->insn.nsrc && i < Elements(src); ++i)
for (i = 0; i < tx->insn.nsrc && i < ARRAY_SIZE(src); ++i)
src[i] = tx_src_param(tx, &tx->insn.src[i]);
ureg_insn(tx->ureg, tx->insn.info->opcode,
@ -3125,10 +3125,10 @@ sm1_parse_instruction(struct shader_translator *tx)
insn->coissue = !!(tok & D3DSI_COISSUE);
insn->predicated = !!(tok & NINED3DSHADER_INST_PREDICATED);
if (insn->opcode < Elements(tx->op_info_map)) {
if (insn->opcode < ARRAY_SIZE(tx->op_info_map)) {
int k = tx->op_info_map[insn->opcode];
if (k >= 0) {
assert(k < Elements(inst_table));
assert(k < ARRAY_SIZE(inst_table));
info = &inst_table[k];
}
} else {
@ -3195,7 +3195,7 @@ tx_ctor(struct shader_translator *tx, struct nine_shader_info *info)
tx->byte_code = info->byte_code;
tx->parse = info->byte_code;
for (i = 0; i < Elements(info->input_map); ++i)
for (i = 0; i < ARRAY_SIZE(info->input_map); ++i)
info->input_map[i] = NINE_DECLUSAGE_NONE;
info->num_inputs = 0;
@ -3214,7 +3214,7 @@ tx_ctor(struct shader_translator *tx, struct nine_shader_info *info)
info->bumpenvmat_needed = 0;
for (i = 0; i < Elements(tx->regs.rL); ++i) {
for (i = 0; i < ARRAY_SIZE(tx->regs.rL); ++i) {
tx->regs.rL[i] = ureg_dst_undef();
}
tx->regs.address = ureg_dst_undef();
@ -3223,18 +3223,18 @@ tx_ctor(struct shader_translator *tx, struct nine_shader_info *info)
tx->regs.oDepth = ureg_dst_undef();
tx->regs.vPos = ureg_src_undef();
tx->regs.vFace = ureg_src_undef();
for (i = 0; i < Elements(tx->regs.o); ++i)
for (i = 0; i < ARRAY_SIZE(tx->regs.o); ++i)
tx->regs.o[i] = ureg_dst_undef();
for (i = 0; i < Elements(tx->regs.oCol); ++i)
for (i = 0; i < ARRAY_SIZE(tx->regs.oCol); ++i)
tx->regs.oCol[i] = ureg_dst_undef();
for (i = 0; i < Elements(tx->regs.vC); ++i)
for (i = 0; i < ARRAY_SIZE(tx->regs.vC); ++i)
tx->regs.vC[i] = ureg_src_undef();
for (i = 0; i < Elements(tx->regs.vT); ++i)
for (i = 0; i < ARRAY_SIZE(tx->regs.vT); ++i)
tx->regs.vT[i] = ureg_src_undef();
for (i = 0; i < Elements(tx->lconsti); ++i)
for (i = 0; i < ARRAY_SIZE(tx->lconsti); ++i)
tx->lconsti[i].idx = -1;
for (i = 0; i < Elements(tx->lconstb); ++i)
for (i = 0; i < ARRAY_SIZE(tx->lconstb); ++i)
tx->lconstb[i].idx = -1;
sm1_read_version(tx);

8
src/gallium/state_trackers/nine/nine_state.c
View file

@ -1250,7 +1250,7 @@ nine_state_set_defaults(struct NineDevice9 *device, const D3DCAPS9 *caps,
*/
memcpy(state->rs, nine_render_state_defaults, sizeof(state->rs));
for (s = 0; s < Elements(state->ff.tex_stage); ++s) {
for (s = 0; s < ARRAY_SIZE(state->ff.tex_stage); ++s) {
memcpy(&state->ff.tex_stage[s], nine_tex_stage_state_defaults,
sizeof(state->ff.tex_stage[s]));
state->ff.tex_stage[s][D3DTSS_TEXCOORDINDEX] = s;
@ -1259,7 +1259,7 @@ nine_state_set_defaults(struct NineDevice9 *device, const D3DCAPS9 *caps,
state->ff.tex_stage[0][D3DTSS_ALPHAOP] = D3DTOP_SELECTARG1;
memset(&state->bumpmap_vars, 0, sizeof(state->bumpmap_vars));
for (s = 0; s < Elements(state->samp); ++s) {
for (s = 0; s < ARRAY_SIZE(state->samp); ++s) {
memcpy(&state->samp[s], nine_samp_state_defaults,
sizeof(state->samp[s]));
}
@ -1290,7 +1290,7 @@ nine_state_set_defaults(struct NineDevice9 *device, const D3DCAPS9 *caps,
state->viewport.MaxZ = 1.0f;
}
for (s = 0; s < Elements(state->changed.sampler); ++s)
for (s = 0; s < ARRAY_SIZE(state->changed.sampler); ++s)
state->changed.sampler[s] = ~0;
if (!is_reset) {
@ -1321,7 +1321,7 @@ nine_state_clear(struct nine_state *state, const boolean device)
{
unsigned i;
for (i = 0; i < Elements(state->rt); ++i)
for (i = 0; i < ARRAY_SIZE(state->rt); ++i)
nine_bind(&state->rt[i], NULL);
nine_bind(&state->ds, NULL);
nine_bind(&state->vs, NULL);

6
src/gallium/state_trackers/nine/stateblock9.c
View file

@ -172,7 +172,7 @@ nine_state_copy_common(struct nine_state *dst,
/* Render states.
* TODO: Maybe build a list ?
*/
for (i = 0; i < Elements(dst->changed.rs); ++i) {
for (i = 0; i < ARRAY_SIZE(dst->changed.rs); ++i) {
uint32_t m = mask->changed.rs[i];
if (apply)
dst->changed.rs[i] |= m;
@ -309,7 +309,7 @@ nine_state_copy_common(struct nine_state *dst,
dst->ff.num_lights_active = src->ff.num_lights_active;
}
if (mask->changed.group & NINE_STATE_FF_VSTRANSF) {
for (i = 0; i < Elements(mask->ff.changed.transform); ++i) {
for (i = 0; i < ARRAY_SIZE(mask->ff.changed.transform); ++i) {
if (!mask->ff.changed.transform[i])
continue;
for (s = i * 32; s < (i * 32 + 32); ++s) {
@ -404,7 +404,7 @@ nine_state_copy_common_all(struct nine_state *dst,
/* Vertex streams. */
if (1) {
for (i = 0; i < Elements(dst->stream); ++i) {
for (i = 0; i < ARRAY_SIZE(dst->stream); ++i) {
nine_bind(&dst->stream[i], src->stream[i]);
if (src->stream[i]) {
dst->vtxbuf[i].buffer_offset = src->vtxbuf[i].buffer_offset;

2
src/gallium/state_trackers/nine/vertexshader9.c
View file

@ -82,7 +82,7 @@ NineVertexShader9_ctor( struct NineVertexShader9 *This,
This->position_t = info.position_t;
This->point_size = info.point_size;
for (i = 0; i < info.num_inputs && i < Elements(This->input_map); ++i)
for (i = 0; i < info.num_inputs && i < ARRAY_SIZE(This->input_map); ++i)
This->input_map[i].ndecl = info.input_map[i];
This->num_inputs = i;

4
src/gallium/state_trackers/omx/vid_dec_h264.c
View file

@ -247,7 +247,7 @@ static void scaling_list(struct vl_rbsp *rbsp, uint8_t *scalingList, unsigned si
static struct pipe_h264_sps *seq_parameter_set_id(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp)
{
unsigned id = vl_rbsp_ue(rbsp);
if (id >= Elements(priv->codec_data.h264.sps))
if (id >= ARRAY_SIZE(priv->codec_data.h264.sps))
return NULL; /* invalid seq_parameter_set_id */
return &priv->codec_data.h264.sps[id];
@ -395,7 +395,7 @@ static void seq_parameter_set(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp)
static struct pipe_h264_pps *pic_parameter_set_id(vid_dec_PrivateType *priv, struct vl_rbsp *rbsp)
{
unsigned id = vl_rbsp_ue(rbsp);
if (id >= Elements(priv->codec_data.h264.pps))
if (id >= ARRAY_SIZE(priv->codec_data.h264.pps))
return NULL; /* invalid pic_parameter_set_id */
return &priv->codec_data.h264.pps[id];

4
src/gallium/state_trackers/osmesa/osmesa.c
View file

@ -324,7 +324,7 @@ osmesa_st_framebuffer_flush_front(struct st_context_iface *stctx,
unsigned i;
/* Find the z/stencil buffer if there is one */
for (i = 0; i < Elements(osbuffer->textures); i++) {
for (i = 0; i < ARRAY_SIZE(osbuffer->textures); i++) {
struct pipe_resource *res = osbuffer->textures[i];
if (res) {
const struct util_format_description *desc =
@ -791,7 +791,7 @@ OSMesaMakeCurrent(OSMesaContext osmesa, void *buffer, GLenum type,
boolean any_pp_enabled = FALSE;
unsigned i;
for (i = 0; i < Elements(osmesa->pp_enabled); i++) {
for (i = 0; i < ARRAY_SIZE(osmesa->pp_enabled); i++) {
if (osmesa->pp_enabled[i]) {
any_pp_enabled = TRUE;
break;

4
src/gallium/state_trackers/va/surface.c
View file

@ -745,9 +745,9 @@ vlVaQueryVideoProcPipelineCaps(VADriverContextP ctx, VAContextID context,
pipeline_cap->filter_flags = 0;
pipeline_cap->num_forward_references = 0;
pipeline_cap->num_backward_references = 0;
pipeline_cap->num_input_color_standards = Elements(vpp_input_color_standards);
pipeline_cap->num_input_color_standards = ARRAY_SIZE(vpp_input_color_standards);
pipeline_cap->input_color_standards = vpp_input_color_standards;
pipeline_cap->num_output_color_standards = Elements(vpp_output_color_standards);
pipeline_cap->num_output_color_standards = ARRAY_SIZE(vpp_output_color_standards);
pipeline_cap->output_color_standards = vpp_output_color_standards;
for (i = 0; i < num_filters; i++) {

6
src/gallium/state_trackers/vdpau/ftab.c
View file

@ -121,17 +121,17 @@ boolean vlGetFuncFTAB(VdpFuncId function_id, void **func)
*func = NULL;
if (function_id < VDP_FUNC_ID_BASE_WINSYS) {
if (function_id < Elements(ftab))
if (function_id < ARRAY_SIZE(ftab))
*func = ftab[function_id];
} else if (function_id < VDP_FUNC_ID_BASE_DRIVER) {
function_id -= VDP_FUNC_ID_BASE_WINSYS;
if (function_id < Elements(ftab_winsys))
if (function_id < ARRAY_SIZE(ftab_winsys))
*func = ftab_winsys[function_id];
} else {
function_id -= VDP_FUNC_ID_BASE_DRIVER;
if (function_id < Elements(ftab_driver))
if (function_id < ARRAY_SIZE(ftab_driver))
*func = ftab_driver[function_id];
}

10
src/gallium/state_trackers/wgl/stw_pixelformat.c
View file

@ -247,7 +247,7 @@ add_color_format_variants(const struct stw_pf_color_info *color_formats,
bind_flags |= PIPE_BIND_DISPLAY_TARGET;
}
for (ms = 0; ms < Elements(stw_pf_multisample); ms++) {
for (ms = 0; ms < ARRAY_SIZE(stw_pf_multisample); ms++) {
unsigned samples = stw_pf_multisample[ms];
if (force_samples && samples != force_samples)
@ -260,10 +260,10 @@ add_color_format_variants(const struct stw_pf_color_info *color_formats,
continue;
}
for (db = 0; db < Elements(stw_pf_doublebuffer); db++) {
for (db = 0; db < ARRAY_SIZE(stw_pf_doublebuffer); db++) {
unsigned doublebuffer = stw_pf_doublebuffer[db];
for (ds = 0; ds < Elements(stw_pf_depth_stencil); ds++) {
for (ds = 0; ds < ARRAY_SIZE(stw_pf_depth_stencil); ds++) {
const struct stw_pf_depth_info *depth = &stw_pf_depth_stencil[ds];
if (!screen->is_format_supported(screen, depth->format,
@ -297,12 +297,12 @@ stw_pixelformat_init( void )
/* normal, displayable formats */
num_formats = add_color_format_variants(stw_pf_color,
Elements(stw_pf_color), FALSE);
ARRAY_SIZE(stw_pf_color), FALSE);
assert(num_formats > 0);
/* extended, pbuffer-only formats */
add_color_format_variants(stw_pf_color_extended,
Elements(stw_pf_color_extended), TRUE);
ARRAY_SIZE(stw_pf_color_extended), TRUE);
assert( stw_dev->pixelformat_count <= stw_dev->pixelformat_extended_count );
assert( stw_dev->pixelformat_extended_count <= STW_MAX_PIXELFORMATS );

2
src/gallium/targets/d3dadapter9/getproc.c
View file

@ -38,7 +38,7 @@ PUBLIC const void * WINAPI
D3DAdapter9GetProc( const char *name )
{
int i;
for (i = 0; i < Elements(drivers); ++i) {
for (i = 0; i < ARRAY_SIZE(drivers); ++i) {
if (strcmp(name, drivers[i].name) == 0) {
return drivers[i].desc;
}

6
src/gallium/targets/graw-null/graw_util.c
View file

@ -19,7 +19,7 @@ graw_parse_geometry_shader(struct pipe_context *pipe,
struct tgsi_token tokens[1024];
struct pipe_shader_state state;
if (!tgsi_text_translate(text, tokens, Elements(tokens)))
if (!tgsi_text_translate(text, tokens, ARRAY_SIZE(tokens)))
return NULL;
memset(&state, 0, sizeof state);
@ -34,7 +34,7 @@ graw_parse_vertex_shader(struct pipe_context *pipe,
struct tgsi_token tokens[1024];
struct pipe_shader_state state;
if (!tgsi_text_translate(text, tokens, Elements(tokens)))
if (!tgsi_text_translate(text, tokens, ARRAY_SIZE(tokens)))
return NULL;
memset(&state, 0, sizeof state);
@ -49,7 +49,7 @@ graw_parse_fragment_shader(struct pipe_context *pipe,
struct tgsi_token tokens[1024];
struct pipe_shader_state state;
if (!tgsi_text_translate(text, tokens, Elements(tokens)))
if (!tgsi_text_translate(text, tokens, ARRAY_SIZE(tokens)))
return NULL;
memset(&state, 0, sizeof state);

2
src/gallium/tests/graw/vs-test.c
View file

@ -227,7 +227,7 @@ static void draw( void )
union pipe_color_union clear_color = { {.1,.3,.5,0} };
ctx->clear(ctx, PIPE_CLEAR_COLOR, &clear_color, 0, 0);
util_draw_arrays(ctx, PIPE_PRIM_POINTS, 0, Elements(vertices));
util_draw_arrays(ctx, PIPE_PRIM_POINTS, 0, ARRAY_SIZE(vertices));
ctx->flush(ctx, NULL, 0);
graw_save_surface_to_file(ctx, surf, NULL);

6
src/gallium/tests/trivial/compute.c
View file

@ -155,7 +155,7 @@ static void init_prog(struct context *ctx, unsigned local_sz,
char *psrc = preprocess_prog(ctx, src, defs);
int ret;
ret = tgsi_text_translate(psrc, prog, Elements(prog));
ret = tgsi_text_translate(psrc, prog, ARRAY_SIZE(prog));
assert(ret);
free(psrc);
@ -1125,7 +1125,7 @@ static void test_surface_ld(struct context *ctx)
init_prog(ctx, 0, 0, 0, src, NULL);
for (i = 0; i < Elements(surface_fmts); i++) {
for (i = 0; i < ARRAY_SIZE(surface_fmts); i++) {
bool is_int = util_format_is_pure_integer(surface_fmts[i]);
printf(" - %s\n", util_format_name(surface_fmts[i]));
@ -1243,7 +1243,7 @@ static void test_surface_st(struct context *ctx)
init_prog(ctx, 0, 0, 0, src, NULL);
for (i = 0; i < Elements(surface_fmts); i++) {
for (i = 0; i < ARRAY_SIZE(surface_fmts); i++) {
bool is_signed = (util_format_description(surface_fmts[i])
->channel[0].type == UTIL_FORMAT_TYPE_SIGNED);
bool is_int = util_format_is_pure_integer(surface_fmts[i]);

4
src/gallium/tests/unit/translate_test.c
View file

@ -134,7 +134,7 @@ int main(int argc, char** argv)
return 2;
}
for (i = 1; i < Elements(buffer); ++i)
for (i = 1; i < ARRAY_SIZE(buffer); ++i)
buffer[i] = align_malloc(buffer_size, 4096);
byte_buffer = align_malloc(buffer_size, 4096);
@ -294,7 +294,7 @@ int main(int argc, char** argv)
if (1)
{
for (i = 0; i < Elements(buffer); ++i)
for (i = 0; i < ARRAY_SIZE(buffer); ++i)
{
unsigned format_size = (i & 1) ? output_format_size : input_format_size;
printf("%c ", (i == 2 || i == 4) ? '*' : ' ');

8
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
View file

@ -306,7 +306,7 @@ static boolean amdgpu_init_cs_context(struct amdgpu_cs *cs,
return FALSE;
}
for (i = 0; i < Elements(cs->buffer_indices_hashlist); i++) {
for (i = 0; i < ARRAY_SIZE(cs->buffer_indices_hashlist); i++) {
cs->buffer_indices_hashlist[i] = -1;
}
return TRUE;
@ -327,7 +327,7 @@ static void amdgpu_cs_context_cleanup(struct amdgpu_cs *cs)
cs->used_gart = 0;
cs->used_vram = 0;
for (i = 0; i < Elements(cs->buffer_indices_hashlist); i++) {
for (i = 0; i < ARRAY_SIZE(cs->buffer_indices_hashlist); i++) {
cs->buffer_indices_hashlist[i] = -1;
}
}
@ -427,7 +427,7 @@ amdgpu_cs_add_const_preamble_ib(struct radeon_winsys_cs *rcs)
int amdgpu_lookup_buffer(struct amdgpu_cs *cs, struct amdgpu_winsys_bo *bo)
{
unsigned hash = bo->unique_id & (Elements(cs->buffer_indices_hashlist)-1);
unsigned hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1);
int i = cs->buffer_indices_hashlist[hash];
/* not found or found */
@ -461,7 +461,7 @@ static unsigned amdgpu_add_buffer(struct amdgpu_cs *cs,
enum radeon_bo_domain *added_domains)
{
struct amdgpu_cs_buffer *buffer;
unsigned hash = bo->unique_id & (Elements(cs->buffer_indices_hashlist)-1);
unsigned hash = bo->unique_id & (ARRAY_SIZE(cs->buffer_indices_hashlist)-1);
int i = -1;
assert(priority < 64);

8
src/gallium/winsys/radeon/drm/radeon_drm_cs.c
View file

@ -128,7 +128,7 @@ static boolean radeon_init_cs_context(struct radeon_cs_context *csc,
csc->cs.chunks = (uint64_t)(uintptr_t)csc->chunk_array;
for (i = 0; i < Elements(csc->reloc_indices_hashlist); i++) {
for (i = 0; i < ARRAY_SIZE(csc->reloc_indices_hashlist); i++) {
csc->reloc_indices_hashlist[i] = -1;
}
return TRUE;
@ -150,7 +150,7 @@ static void radeon_cs_context_cleanup(struct radeon_cs_context *csc)
csc->used_gart = 0;
csc->used_vram = 0;
for (i = 0; i < Elements(csc->reloc_indices_hashlist); i++) {
for (i = 0; i < ARRAY_SIZE(csc->reloc_indices_hashlist); i++) {
csc->reloc_indices_hashlist[i] = -1;
}
}
@ -221,7 +221,7 @@ static inline void update_reloc(struct drm_radeon_cs_reloc *reloc,
int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo)
{
unsigned hash = bo->handle & (Elements(csc->reloc_indices_hashlist)-1);
unsigned hash = bo->handle & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1);
int i = csc->reloc_indices_hashlist[hash];
/* not found or found */
@ -256,7 +256,7 @@ static unsigned radeon_add_buffer(struct radeon_drm_cs *cs,
{
struct radeon_cs_context *csc = cs->csc;
struct drm_radeon_cs_reloc *reloc;
unsigned hash = bo->handle & (Elements(csc->reloc_indices_hashlist)-1);
unsigned hash = bo->handle & (ARRAY_SIZE(csc->reloc_indices_hashlist)-1);
enum radeon_bo_domain rd = usage & RADEON_USAGE_READ ? domains : 0;
enum radeon_bo_domain wd = usage & RADEON_USAGE_WRITE ? domains : 0;
int i = -1;