i965/fs: Move brw_wm_lookup_iz() to fs_visitor::setup_payload_gen4().

This necessitates compiling brw_wm_iz.c as C++.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>

src/mesa/drivers/dri/i965/Makefile.sources

@@ -97,7 +97,7 @@ i965_FILES = \
 	brw_vs_surface_state.c \
 	brw_vtbl.c \
 	brw_wm.c \
-	brw_wm_iz.c \
+	brw_wm_iz.cpp \
 	brw_wm_sampler_state.c \
 	brw_wm_state.c \
 	brw_wm_surface_state.c \

src/mesa/drivers/dri/i965/brw_fs.cpp

@@ -2031,7 +2031,7 @@ fs_visitor::run()
    if (intel->gen >= 6)
       setup_payload_gen6();
    else
-      brw_wm_lookup_iz(intel, c);
+      setup_payload_gen4();
 
    if (c->dispatch_width == 16) {
       /* We have to do a compaction pass now, or the one at the end of

src/mesa/drivers/dri/i965/brw_fs.h

@@ -249,6 +249,7 @@ public:
 					   fs_reg reg);
 
    bool run();
+   void setup_payload_gen4();
    void setup_payload_gen6();
    void setup_paramvalues_refs();
    void assign_curb_setup();

src/mesa/drivers/dri/i965/brw_wm.h

@@ -97,9 +97,6 @@ struct brw_wm_compile {
    GLuint dispatch_width;
 };
 
-void brw_wm_lookup_iz(struct intel_context *intel,
-		      struct brw_wm_compile *c);
-
 bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
 		    struct gl_shader_program *prog);
 

src/mesa/drivers/dri/i965/brw_wm_iz.cpp

@@ -31,18 +31,18 @@
 
 
 #include "main/mtypes.h"
-#include "brw_wm.h"
+#include "brw_fs.h"
 
 
-#undef P			/* prompted depth */
-#undef C			/* computed */
-#undef N			/* non-promoted? */
+#undef P                        /* prompted depth */
+#undef C                        /* computed */
+#undef N                        /* non-promoted? */
 
 #define P 0
 #define C 1
 #define N 2
 
-const struct {
+static const struct {
    GLuint mode:2;
    GLuint sd_present:1;
    GLuint sd_to_rt:1;
@@ -120,16 +120,15 @@ const struct {
  * \param line_aa  AA_NEVER, AA_ALWAYS or AA_SOMETIMES
  * \param lookup  bitmask of IZ_* flags
  */
-void brw_wm_lookup_iz(struct intel_context *intel,
-		      struct brw_wm_compile *c)
+void fs_visitor::setup_payload_gen4()
 {
    GLuint reg = 2;
    bool kill_stats_promoted_workaround = false;
    int lookup = c->key.iz_lookup;
-   bool uses_depth = (c->fp->program.Base.InputsRead &
-		      (1 << FRAG_ATTRIB_WPOS)) != 0;
+   bool uses_depth =
+      (c->fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
 
-   assert (lookup < IZ_BIT_MAX);
+   assert(lookup < IZ_BIT_MAX);
 
    /* Crazy workaround in the windowizer, which we need to track in
     * our register allocation and render target writes.  See the "If
@@ -154,7 +153,7 @@ void brw_wm_lookup_iz(struct intel_context *intel,
    if (wm_iz_table[lookup].ds_present || c->key.line_aa != AA_NEVER) {
       c->aa_dest_stencil_reg = reg;
       c->runtime_check_aads_emit = (!wm_iz_table[lookup].ds_present &&
-				    c->key.line_aa == AA_SOMETIMES);
+                                    c->key.line_aa == AA_SOMETIMES);
       reg++;
    }