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i965/fs: Move brw_wm_lookup_iz() to fs_visitor::setup_payload_gen4().

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This necessitates compiling brw_wm_iz.c as C++.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
This commit is contained in:
Kenneth Graunke 2012-11-19 14:59:14 -08:00
parent 2429c9d347
commit 47a6a7b51b
5 changed files with 82 additions and 85 deletions
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2
src/mesa/drivers/dri/i965/Makefile.sources
View file

@ -97,7 +97,7 @@ i965_FILES = \
brw_vs_surface_state.c \ brw_vs_surface_state.c \
brw_vtbl.c \ brw_vtbl.c \
brw_wm.c \ brw_wm.c \
brw_wm_iz.c \ brw_wm_iz.cpp \
brw_wm_sampler_state.c \ brw_wm_sampler_state.c \
brw_wm_state.c \ brw_wm_state.c \
brw_wm_surface_state.c \ brw_wm_surface_state.c \

2
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -2031,7 +2031,7 @@ fs_visitor::run()
if (intel->gen >= 6) if (intel->gen >= 6)
setup_payload_gen6(); setup_payload_gen6();
else else
brw_wm_lookup_iz(intel, c); setup_payload_gen4();
if (c->dispatch_width == 16) { if (c->dispatch_width == 16) {
/* We have to do a compaction pass now, or the one at the end of /* We have to do a compaction pass now, or the one at the end of

1
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -249,6 +249,7 @@ public:
fs_reg reg); fs_reg reg);
bool run(); bool run();
void setup_payload_gen4();
void setup_payload_gen6(); void setup_payload_gen6();
void setup_paramvalues_refs(); void setup_paramvalues_refs();
void assign_curb_setup(); void assign_curb_setup();

3
src/mesa/drivers/dri/i965/brw_wm.h
View file

@ -97,9 +97,6 @@ struct brw_wm_compile {
GLuint dispatch_width; GLuint dispatch_width;
}; };
void brw_wm_lookup_iz(struct intel_context *intel,
struct brw_wm_compile *c);
bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c, bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
struct gl_shader_program *prog); struct gl_shader_program *prog);

159
src/mesa/drivers/dri/i965/brw_wm_iz.c → src/mesa/drivers/dri/i965/brw_wm_iz.cpp
View file

@ -2,7 +2,7 @@
Copyright (C) Intel Corp. 2006. All Rights Reserved. Copyright (C) Intel Corp. 2006. All Rights Reserved.
Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
develop this 3D driver. develop this 3D driver.
Permission is hereby granted, free of charge, to any person obtaining Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including "Software"), to deal in the Software without restriction, including
@ -10,11 +10,11 @@
distribute, sublicense, and/or sell copies of the Software, and to distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to permit persons to whom the Software is furnished to do so, subject to
the following conditions: the following conditions:
The above copyright notice and this permission notice (including the The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial next paragraph) shall be included in all copies or substantial
portions of the Software. portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
@ -22,27 +22,27 @@
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
**********************************************************************/ **********************************************************************/
/* /*
* Authors: * Authors:
* Keith Whitwell <keith@tungstengraphics.com> * Keith Whitwell <keith@tungstengraphics.com>
*/ */
#include "main/mtypes.h" #include "main/mtypes.h"
#include "brw_wm.h" #include "brw_fs.h"
#undef P /* prompted depth */ #undef P /* prompted depth */
#undef C /* computed */ #undef C /* computed */
#undef N /* non-promoted? */ #undef N /* non-promoted? */
#define P 0 #define P 0
#define C 1 #define C 1
#define N 2 #define N 2
const struct { static const struct {
GLuint mode:2; GLuint mode:2;
GLuint sd_present:1; GLuint sd_present:1;
GLuint sd_to_rt:1; GLuint sd_to_rt:1;
@ -50,86 +50,85 @@ const struct {
GLuint ds_present:1; GLuint ds_present:1;
} wm_iz_table[IZ_BIT_MAX] = } wm_iz_table[IZ_BIT_MAX] =
{ {
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ N, 1, 1, 0, 0 }, { N, 1, 1, 0, 0 },
{ N, 0, 1, 0, 0 }, { N, 0, 1, 0, 0 },
{ N, 0, 1, 0, 0 }, { N, 0, 1, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ N, 1, 1, 0, 0 }, { N, 1, 1, 0, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ N, 1, 1, 0, 0 }, { N, 1, 1, 0, 0 },
{ N, 0, 1, 0, 0 }, { N, 0, 1, 0, 0 },
{ N, 0, 1, 0, 0 }, { N, 0, 1, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ N, 1, 1, 0, 0 }, { N, 1, 1, 0, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ C, 0, 1, 1, 0 }, { C, 0, 1, 1, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ N, 1, 1, 0, 1 }, { N, 1, 1, 0, 1 },
{ N, 0, 1, 0, 1 }, { N, 0, 1, 0, 1 },
{ N, 0, 1, 0, 1 }, { N, 0, 1, 0, 1 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 0, 1, 1, 1 }, { C, 0, 1, 1, 1 },
{ C, 0, 1, 1, 1 }, { C, 0, 1, 1, 1 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ N, 1, 1, 0, 1 }, { N, 1, 1, 0, 1 },
{ C, 0, 1, 1, 1 }, { C, 0, 1, 1, 1 },
{ C, 0, 1, 1, 1 }, { C, 0, 1, 1, 1 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 0, 0, 0, 1 }, { C, 0, 0, 0, 1 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 0, 1, 0, 1 }, { C, 0, 1, 0, 1 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 1, 1, 0, 1 }, { C, 1, 1, 0, 1 },
{ C, 0, 1, 0, 1 }, { C, 0, 1, 0, 1 },
{ C, 0, 1, 0, 1 }, { C, 0, 1, 0, 1 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 1, 1, 1, 1 }, { C, 1, 1, 1, 1 },
{ C, 0, 1, 1, 1 }, { C, 0, 1, 1, 1 },
{ C, 0, 1, 1, 1 }, { C, 0, 1, 1, 1 },
{ P, 0, 0, 0, 0 }, { P, 0, 0, 0, 0 },
{ C, 1, 1, 1, 1 }, { C, 1, 1, 1, 1 },
{ C, 0, 1, 1, 1 }, { C, 0, 1, 1, 1 },
{ C, 0, 1, 1, 1 } { C, 0, 1, 1, 1 }
}; };
/** /**
* \param line_aa AA_NEVER, AA_ALWAYS or AA_SOMETIMES * \param line_aa AA_NEVER, AA_ALWAYS or AA_SOMETIMES
* \param lookup bitmask of IZ_* flags * \param lookup bitmask of IZ_* flags
*/ */
void brw_wm_lookup_iz(struct intel_context *intel, void fs_visitor::setup_payload_gen4()
struct brw_wm_compile *c)
{ {
GLuint reg = 2; GLuint reg = 2;
bool kill_stats_promoted_workaround = false; bool kill_stats_promoted_workaround = false;
int lookup = c->key.iz_lookup; int lookup = c->key.iz_lookup;
bool uses_depth = (c->fp->program.Base.InputsRead & bool uses_depth =
(1 << FRAG_ATTRIB_WPOS)) != 0; (c->fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
assert (lookup < IZ_BIT_MAX); assert(lookup < IZ_BIT_MAX);
/* Crazy workaround in the windowizer, which we need to track in /* Crazy workaround in the windowizer, which we need to track in
* our register allocation and render target writes. See the "If * our register allocation and render target writes. See the "If
@ -154,7 +153,7 @@ void brw_wm_lookup_iz(struct intel_context *intel,
if (wm_iz_table[lookup].ds_present || c->key.line_aa != AA_NEVER) { if (wm_iz_table[lookup].ds_present || c->key.line_aa != AA_NEVER) {
c->aa_dest_stencil_reg = reg; c->aa_dest_stencil_reg = reg;
c->runtime_check_aads_emit = (!wm_iz_table[lookup].ds_present && c->runtime_check_aads_emit = (!wm_iz_table[lookup].ds_present &&
c->key.line_aa == AA_SOMETIMES); c->key.line_aa == AA_SOMETIMES);
reg++; reg++;
} }