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i965/fs: Move brw_wm_lookup_iz() to fs_visitor::setup_payload_gen4().

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This necessitates compiling brw_wm_iz.c as C++.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
This commit is contained in:
Kenneth Graunke 2012-11-19 14:59:14 -08:00
parent 2429c9d347
commit 47a6a7b51b
5 changed files with 82 additions and 85 deletions
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2
src/mesa/drivers/dri/i965/Makefile.sources
View file

@ -97,7 +97,7 @@ i965_FILES = \
brw_vs_surface_state.c \ brw_vs_surface_state.c \
brw_vtbl.c \ brw_vtbl.c \
brw_wm.c \ brw_wm.c \
brw_wm_iz.c \ brw_wm_iz.cpp \
brw_wm_sampler_state.c \ brw_wm_sampler_state.c \
brw_wm_state.c \ brw_wm_state.c \
brw_wm_surface_state.c \ brw_wm_surface_state.c \

2
src/mesa/drivers/dri/i965/brw_fs.cpp
View file

@ -2031,7 +2031,7 @@ fs_visitor::run()
if (intel->gen >= 6) if (intel->gen >= 6)
setup_payload_gen6(); setup_payload_gen6();
else else
brw_wm_lookup_iz(intel, c); setup_payload_gen4();
if (c->dispatch_width == 16) { if (c->dispatch_width == 16) {
/* We have to do a compaction pass now, or the one at the end of /* We have to do a compaction pass now, or the one at the end of

1
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -249,6 +249,7 @@ public:
fs_reg reg); fs_reg reg);
bool run(); bool run();
void setup_payload_gen4();
void setup_payload_gen6(); void setup_payload_gen6();
void setup_paramvalues_refs(); void setup_paramvalues_refs();
void assign_curb_setup(); void assign_curb_setup();

3
src/mesa/drivers/dri/i965/brw_wm.h
View file

@ -97,9 +97,6 @@ struct brw_wm_compile {
GLuint dispatch_width; GLuint dispatch_width;
}; };
void brw_wm_lookup_iz(struct intel_context *intel,
struct brw_wm_compile *c);
bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c, bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
struct gl_shader_program *prog); struct gl_shader_program *prog);

13
src/mesa/drivers/dri/i965/brw_wm_iz.c → src/mesa/drivers/dri/i965/brw_wm_iz.cpp
View file

@ -31,7 +31,7 @@
#include "main/mtypes.h" #include "main/mtypes.h"
#include "brw_wm.h" #include "brw_fs.h"
#undef P /* prompted depth */ #undef P /* prompted depth */
@ -42,7 +42,7 @@
#define C 1 #define C 1
#define N 2 #define N 2
const struct { static const struct {
GLuint mode:2; GLuint mode:2;
GLuint sd_present:1; GLuint sd_present:1;
GLuint sd_to_rt:1; GLuint sd_to_rt:1;
@ -120,16 +120,15 @@ const struct {
* \param line_aa AA_NEVER, AA_ALWAYS or AA_SOMETIMES * \param line_aa AA_NEVER, AA_ALWAYS or AA_SOMETIMES
* \param lookup bitmask of IZ_* flags * \param lookup bitmask of IZ_* flags
*/ */
void brw_wm_lookup_iz(struct intel_context *intel, void fs_visitor::setup_payload_gen4()
struct brw_wm_compile *c)
{ {
GLuint reg = 2; GLuint reg = 2;
bool kill_stats_promoted_workaround = false; bool kill_stats_promoted_workaround = false;
int lookup = c->key.iz_lookup; int lookup = c->key.iz_lookup;
bool uses_depth = (c->fp->program.Base.InputsRead & bool uses_depth =
(1 << FRAG_ATTRIB_WPOS)) != 0; (c->fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
assert (lookup < IZ_BIT_MAX); assert(lookup < IZ_BIT_MAX);
/* Crazy workaround in the windowizer, which we need to track in /* Crazy workaround in the windowizer, which we need to track in
* our register allocation and render target writes. See the "If * our register allocation and render target writes. See the "If