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freedreno/registers: add A5XX_RBBM_STATUS3 bit

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Same bit as a6xx.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11311>
This commit is contained in:
Rob Clark 2021-06-10 12:42:30 -07:00 • committed by Marge Bot
parent 71c59aa413
commit 476f86fcb2
1 changed files with 3 additions and 1 deletions
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4
src/freedreno/registers/adreno/a5xx.xml
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@ -1366,7 +1366,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
<bitfield high="1" low="1" name="CP_ME_BUSY" />
<bitfield high="0" low="0" name="HI_BUSY" />
</reg32>
<reg32 offset="0x0530" name="RBBM_STATUS3"/>
<reg32 offset="0x0530" name="RBBM_STATUS3">
<bitfield pos="24" name="SMMU_STALLED_ON_FAULT" type="boolean"/>
</reg32>
<reg32 offset="0x04e1" name="RBBM_INT_0_STATUS"/>
<reg32 offset="0x04f0" name="RBBM_AHB_ME_SPLIT_STATUS"/>
<reg32 offset="0x04f1" name="RBBM_AHB_PFP_SPLIT_STATUS"/>