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r300compiler, r300 classic, r300g: Add support for MRTs in the frag shader.

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This maybe breaks the vert compiler. Hopefully not.
This commit is contained in:
Corbin Simpson 2009-11-11 03:06:51 -08:00
parent ad83f3bf0a
commit 4769566500
8 changed files with 40 additions and 14 deletions
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10
src/gallium/drivers/r300/r300_fs.c
View file

@ -77,17 +77,21 @@ void r300_shader_read_fs_inputs(struct tgsi_shader_info* info,
static void find_output_registers(struct r300_fragment_program_compiler * compiler,
struct r300_fragment_shader * fs)
{
unsigned i;
unsigned i, colorbuf_count = 0;
/* Mark the outputs as not present initially */
compiler->OutputColor = fs->info.num_outputs;
compiler->OutputColor[0] = fs->info.num_outputs;
compiler->OutputColor[1] = fs->info.num_outputs;
compiler->OutputColor[2] = fs->info.num_outputs;
compiler->OutputColor[3] = fs->info.num_outputs;
compiler->OutputDepth = fs->info.num_outputs;
/* Now see where they really are. */
for(i = 0; i < fs->info.num_outputs; ++i) {
switch(fs->info.output_semantic_name[i]) {
case TGSI_SEMANTIC_COLOR:
compiler->OutputColor = i;
compiler->OutputColor[colorbuf_count] = i;
colorbuf_count++;
break;
case TGSI_SEMANTIC_POSITION:
compiler->OutputDepth = i;

7
src/mesa/drivers/dri/r300/compiler/r300_fragprog_emit.c
View file

@ -176,7 +176,9 @@ static int emit_alu(struct r300_emit_state * emit, struct rc_pair_instruction* i
(inst->RGB.WriteMask << R300_ALU_DSTC_REG_MASK_SHIFT);
}
if (inst->RGB.OutputWriteMask) {
code->alu.inst[ip].rgb_addr |= (inst->RGB.OutputWriteMask << R300_ALU_DSTC_OUTPUT_MASK_SHIFT);
code->alu.inst[ip].rgb_addr |=
(inst->RGB.OutputWriteMask << R300_ALU_DSTC_OUTPUT_MASK_SHIFT) |
R300_RGB_TARGET(inst->RGB.Target);
emit->node_flags |= R300_RGBA_OUT;
}
@ -187,7 +189,8 @@ static int emit_alu(struct r300_emit_state * emit, struct rc_pair_instruction* i
R300_ALU_DSTA_REG;
}
if (inst->Alpha.OutputWriteMask) {
code->alu.inst[ip].alpha_addr |= R300_ALU_DSTA_OUTPUT;
code->alu.inst[ip].alpha_addr |= R300_ALU_DSTA_OUTPUT |
R300_ALPHA_TARGET(inst->Alpha.Target);
emit->node_flags |= R300_RGBA_OUT;
}
if (inst->Alpha.DepthWriteMask) {

5
src/mesa/drivers/dri/r300/compiler/r3xx_fragprog.c
View file

@ -35,7 +35,10 @@ static void dataflow_outputs_mark_use(void * userdata, void * data,
void (*callback)(void *, unsigned int, unsigned int))
{
struct r300_fragment_program_compiler * c = userdata;
callback(data, c->OutputColor, RC_MASK_XYZW);
callback(data, c->OutputColor[0], RC_MASK_XYZW);
callback(data, c->OutputColor[1], RC_MASK_XYZW);
callback(data, c->OutputColor[2], RC_MASK_XYZW);
callback(data, c->OutputColor[3], RC_MASK_XYZW);
callback(data, c->OutputDepth, RC_MASK_W);
}

3
src/mesa/drivers/dri/r300/compiler/r500_fragprog_emit.c
View file

@ -241,6 +241,9 @@ static void emit_paired(struct r300_fragment_program_compiler *c, struct rc_pair
code->inst[ip].inst4 |= translate_arg_alpha(inst, 1) << R500_ALPHA_SEL_B_SHIFT;
code->inst[ip].inst5 |= translate_arg_alpha(inst, 2) << R500_ALU_RGBA_ALPHA_SEL_C_SHIFT;
code->inst[ip].inst3 |= R500_ALU_RGB_TARGET(inst->RGB.Target);
code->inst[ip].inst4 |= R500_ALPHA_TARGET(inst->Alpha.Target);
if (inst->WriteALUResult) {
code->inst[ip].inst3 |= R500_ALU_RGB_WMASK;

4
src/mesa/drivers/dri/r300/compiler/radeon_compiler.h
View file

@ -83,8 +83,10 @@ struct r300_fragment_program_compiler {
struct rX00_fragment_program_code *code;
struct r300_fragment_program_external_state state;
unsigned is_r500;
/* Register corresponding to the depthbuffer. */
unsigned OutputDepth;
unsigned OutputColor;
/* Registers corresponding to the four colorbuffers. */
unsigned OutputColor[4];
void * UserData;
void (*AllocateHwInputs)(

21
src/mesa/drivers/dri/r300/compiler/radeon_pair_translate.c
View file

@ -203,12 +203,21 @@ static void set_pair_instruction(struct r300_fragment_program_compiler *c,
/* Destination handling */
if (inst->DstReg.File == RC_FILE_OUTPUT) {
if (inst->DstReg.Index == c->OutputColor) {
pair->RGB.OutputWriteMask |= inst->DstReg.WriteMask & RC_MASK_XYZ;
pair->Alpha.OutputWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
} else if (inst->DstReg.Index == c->OutputDepth) {
pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
}
if (inst->DstReg.Index == c->OutputDepth) {
pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3);
} else {
for (i = 0; i < 4; i++) {
if (inst->DstReg.Index == c->OutputColor[i]) {
pair->RGB.Target = inst->DstReg.Index;
pair->Alpha.Target = inst->DstReg.Index;
pair->RGB.OutputWriteMask |=
inst->DstReg.WriteMask & RC_MASK_XYZ;
pair->Alpha.OutputWriteMask |=
GET_BIT(inst->DstReg.WriteMask, 3);
break;
}
}
}
} else {
if (needrgb) {
pair->RGB.DestIndex = inst->DstReg.Index;

2
src/mesa/drivers/dri/r300/compiler/radeon_program_pair.h
View file

@ -60,6 +60,7 @@ struct radeon_pair_instruction_rgb {
unsigned int Opcode:8;
unsigned int DestIndex:RC_REGISTER_INDEX_BITS;
unsigned int WriteMask:3;
unsigned int Target:2;
unsigned int OutputWriteMask:3;
unsigned int Saturate:1;
@ -77,6 +78,7 @@ struct radeon_pair_instruction_alpha {
unsigned int Opcode:8;
unsigned int DestIndex:RC_REGISTER_INDEX_BITS;
unsigned int WriteMask:1;
unsigned int Target:2;
unsigned int OutputWriteMask:1;
unsigned int DepthWriteMask:1;
unsigned int Saturate:1;

2
src/mesa/drivers/dri/r300/r300_fragprog_common.c
View file

@ -221,7 +221,7 @@ static void translate_fragment_program(GLcontext *ctx, struct r300_fragment_prog
compiler.state = fp->state;
compiler.is_r500 = (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) ? GL_TRUE : GL_FALSE;
compiler.OutputDepth = FRAG_RESULT_DEPTH;
compiler.OutputColor = FRAG_RESULT_COLOR;
compiler.OutputColor[0] = FRAG_RESULT_COLOR;
compiler.AllocateHwInputs = &allocate_hw_inputs;
if (compiler.Base.Debug) {