From 473732dfd17d6532706268e1fab976aa09bc87a6 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 19 Jan 2023 10:14:53 +0100 Subject: [PATCH] radv: remove an old FIXME about a possible bug with TC-compat HTILE I added this FIXME 2 years ago because it was unclear if it was broken or not. Since, CTS coverage improved and the number of tests with depth/stencil on the compute queue increased a lot. vkd3d-proton also widely uses depth/stencil with GENERAL on GFX10+ and likely with async compute as well. No issues so far. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4048 Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_image.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index c8f49889395..e0e148f94d6 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -2298,9 +2298,6 @@ radv_layout_is_htile_compressed(const struct radv_device *device, const struct r * depth pass because this allows compression and this reduces * the number of decompressions from/to GENERAL. */ - /* FIXME: Enabling TC-compat HTILE in GENERAL on the compute - * queue is likely broken for eg. depth/stencil copies. - */ if (radv_image_is_tc_compat_htile(image) && queue_mask & (1u << RADV_QUEUE_GENERAL) && !device->instance->disable_tc_compat_htile_in_general) { return true;