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etnaviv: isa: Add bit_extract opcode
Encoded instruction is taken from blob running: - dEQP-GLES31.functional.shaders.builtin_functions.integer.bitfieldextract.int_lowp_vertex Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27871>
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2 changed files with 6 additions and 0 deletions
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@ -1137,6 +1137,11 @@ SPDX-License-Identifier: MIT
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<pattern pos="80">1</pattern> <!-- OPCODE_BIT6 -->
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</bitset>
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<bitset name="bit_extract" extends="#instruction-alu-src0-src1-src2">
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<pattern low="0" high="5">100000</pattern> <!-- OPC -->
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<pattern pos="80">1</pattern> <!-- OPCODE_BIT6 -->
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</bitset>
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<bitset name="popcount" extends="#instruction-alu-src2">
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<pattern low="0" high="5">100001</pattern> <!-- OPC -->
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<pattern pos="80">1</pattern> <!-- OPCODE_BIT6 -->
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@ -136,6 +136,7 @@ INSTANTIATE_TEST_SUITE_P(Opcodes, DisasmTest,
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disasm_state{ {0x0082101d, 0x00001804, 0x40010000, 0x00000008}, "and.s32 t2.x___, t1.xxxx, void, t0.xxxx\n"},
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disasm_state{ {0x0080101e, 0x00001804, 0x40010000, 0x00000008}, "xor.s32 t0.x___, t1.xxxx, void, t0.xxxx\n"},
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disasm_state{ {0x0080101f, 0x00000004, 0x40010000, 0x00000018}, "not.s32 t0.x___, void, void, t1.xxxx\n"},
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disasm_state{ {0x00811020, 0x00001804, 0x40010140, 0x00000038}, "bit_extract.s32 t1.x___, t1.xxxx, t2.xxxx, t3.xxxx\n"},
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disasm_state{ {0x00801021, 0x00000004, 0x00010000, 0x00000008}, "popcount t0.x___, void, void, t0.xxxx\n"},
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disasm_state{ {0x00801017, 0x00000004, 0x40010000, 0x00000018}, "iabs.s32 t0.x___, void, void, t1.xxxx\n"},
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disasm_state{ {0x00801018, 0x00000004, 0x40010000, 0x00000008}, "leadzero.s32 t0.x___, void, void, t0.xxxx\n"},
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