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radv: add missing FDCC_CONTROL bits for GFX1103 R2

Browse source 
Ported from RadeonSI.
Found by inspection, untested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26318>
This commit is contained in:
Samuel Pitoiset 2023-11-21 16:24:39 +01:00 • committed by Marge Bot
parent ab34603115
commit 46cc7ffb79
1 changed files with 4 additions and 0 deletions
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4
src/amd/vulkan/radv_device.c
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@ -1546,6 +1546,10 @@ radv_init_dcc_control_reg(struct radv_device *device, struct radv_image_view *iv
result |= S_028C78_INDEPENDENT_128B_BLOCKS_GFX11(independent_128b_blocks) |
S_028C78_DISABLE_CONSTANT_ENCODE_REG(1) |
S_028C78_FDCC_ENABLE(radv_dcc_enabled(iview->image, iview->vk.base_mip_level));
if (device->physical_device->rad_info.family >= CHIP_GFX1103_R2) {
result |= S_028C78_ENABLE_MAX_COMP_FRAG_OVERRIDE(1) | S_028C78_MAX_COMP_FRAGS(iview->image->vk.samples >= 4);
}
} else {
result |= S_028C78_INDEPENDENT_128B_BLOCKS_GFX10(independent_128b_blocks);
}