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freedreno/computerator: gen8 support
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38450>
This commit is contained in:
parent
46dd4b166e
commit
469a19f66b
3 changed files with 22 additions and 26 deletions
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@ -28,6 +28,7 @@
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#include "fd6_hw.h"
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#include "fd6_hw.h"
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#include "common/freedreno_dev_info.h"
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#include "common/freedreno_dev_info.h"
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#include "fdl/freedreno_layout.h"
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#include "ir3_asm.h"
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#include "ir3_asm.h"
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#include "main.h"
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#include "main.h"
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@ -116,7 +117,10 @@ cs_restore_emit(fd_cs &cs, struct a6xx_backend *a6xx_backend)
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fd_ncrb<CHIP> ncrb(cs, 2 + ARRAY_SIZE(a6xx_backend->info->magic_raw));
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fd_ncrb<CHIP> ncrb(cs, 2 + ARRAY_SIZE(a6xx_backend->info->magic_raw));
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ncrb.add(A6XX_SP_PERFCTR_SHADER_MASK(.cs = true));
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ncrb.add(A6XX_SP_PERFCTR_SHADER_MASK(.cs = true));
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ncrb.add(A6XX_SP_NC_MODE_CNTL_2());
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/* KMD programs this (and blocks UMD access) on gen8+: */
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if (CHIP < A8XX)
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ncrb.add(A6XX_SP_NC_MODE_CNTL_2());
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for (size_t i = 0; i < ARRAY_SIZE(a6xx_backend->info->magic_raw); i++) {
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for (size_t i = 0; i < ARRAY_SIZE(a6xx_backend->info->magic_raw); i++) {
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auto magic_reg = a6xx_backend->info->magic_raw[i];
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auto magic_reg = a6xx_backend->info->magic_raw[i];
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@ -175,7 +179,7 @@ cs_program_emit_regs(fd_cs &cs, struct kernel *kernel)
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.mergedregs = v->mergedregs,
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.mergedregs = v->mergedregs,
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));
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));
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if (CHIP == A7XX) {
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if (CHIP >= A7XX) {
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crb.add(SP_PS_WAVE_CNTL(CHIP, .threadsize = THREAD64));
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crb.add(SP_PS_WAVE_CNTL(CHIP, .threadsize = THREAD64));
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crb.add(SP_REG_PROG_ID_0(CHIP, .dword = 0xfcfcfcfc));
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crb.add(SP_REG_PROG_ID_0(CHIP, .dword = 0xfcfcfcfc));
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@ -226,7 +230,7 @@ cs_program_emit_regs(fd_cs &cs, struct kernel *kernel)
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));
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));
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}
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}
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if (CHIP == A7XX || a6xx_backend->info->props.has_lpac) {
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if (CHIP >= A7XX || a6xx_backend->info->props.has_lpac) {
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crb.add(A6XX_SP_CS_WIE_CNTL_0(
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crb.add(A6XX_SP_CS_WIE_CNTL_0(
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.wgidconstid = work_group_id,
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.wgidconstid = work_group_id,
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.wgsizeconstid = INVALID_REG,
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.wgsizeconstid = INVALID_REG,
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@ -234,7 +238,7 @@ cs_program_emit_regs(fd_cs &cs, struct kernel *kernel)
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.localidregid = local_invocation_id,
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.localidregid = local_invocation_id,
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));
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));
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if (CHIP == A7XX) {
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if (CHIP >= A7XX) {
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/* TODO allow the shader to control the tiling */
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/* TODO allow the shader to control the tiling */
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crb.add(SP_CS_WIE_CNTL_1(CHIP,
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crb.add(SP_CS_WIE_CNTL_1(CHIP,
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.linearlocalidregid = INVALID_REG,
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.linearlocalidregid = INVALID_REG,
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@ -393,6 +397,7 @@ cs_uav_emit(fd_cs &cs, struct fd_device *dev, struct kernel *kernel)
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struct fd_bo *state = fd_bo_new(dev, kernel->num_bufs * 16 * 4,
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struct fd_bo *state = fd_bo_new(dev, kernel->num_bufs * 16 * 4,
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FD_BO_GPUREADONLY | FD_BO_HINT_COMMAND,
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FD_BO_GPUREADONLY | FD_BO_HINT_COMMAND,
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"tex_desc");
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"tex_desc");
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fd_bo_mark_for_dump(state);
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cs.attach_bo(state);
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cs.attach_bo(state);
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@ -405,25 +410,17 @@ cs_uav_emit(fd_cs &cs, struct fd_device *dev, struct kernel *kernel)
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cs.attach_bo(kernel->bufs[i]);
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cs.attach_bo(kernel->bufs[i]);
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/* size is encoded with low 15b in WIDTH and high bits in HEIGHT,
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* in units of elements:
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*/
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unsigned sz = kernel->buf_sizes[i];
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unsigned width = sz & MASK(15);
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unsigned height = sz >> 15;
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uint64_t iova = fd_bo_get_iova(kernel->bufs[i]);
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uint64_t iova = fd_bo_get_iova(kernel->bufs[i]);
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uint32_t descriptor[16];
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uint32_t descriptor[16] = {
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static const uint8_t swiz_identity[4] = {
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A6XX_TEX_CONST_0_FMT(FMT6_32_UINT) | A6XX_TEX_CONST_0_TILE_MODE(TILE6_LINEAR),
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PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y,
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A6XX_TEX_CONST_1_WIDTH(width) | A6XX_TEX_CONST_1_HEIGHT(height),
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PIPE_SWIZZLE_Z, PIPE_SWIZZLE_W,
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A6XX_TEX_CONST_2_PITCH(0) |
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A6XX_TEX_CONST_2_STRUCTSIZETEXELS(1) |
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A6XX_TEX_CONST_2_TYPE(A6XX_TEX_BUFFER),
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A6XX_TEX_CONST_3_ARRAY_PITCH(0),
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(uint32_t)iova,
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(uint32_t)(iova >> 32),
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};
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};
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fdl6_buffer_view_init<CHIP>(descriptor, PIPE_FORMAT_R32_UINT, swiz_identity,
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iova, kernel->buf_sizes[i]);
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memcpy(buf, descriptor, 16 * 4);
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memcpy(buf, descriptor, 16 * 4);
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buf += 16;
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buf += 16;
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}
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}
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@ -574,7 +571,7 @@ a6xx_emit_grid(struct kernel *kernel, uint32_t grid[3],
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.localsizez = local_size[2] - 1,
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.localsizez = local_size[2] - 1,
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));
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));
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if (CHIP == A7XX) {
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if (CHIP >= A7XX) {
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crb.add(SP_CS_NDRANGE_7(CHIP,
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crb.add(SP_CS_NDRANGE_7(CHIP,
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.localsizex = local_size[0] - 1,
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.localsizex = local_size[0] - 1,
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.localsizey = local_size[1] - 1,
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.localsizey = local_size[1] - 1,
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@ -715,9 +712,4 @@ a6xx_init(struct fd_device *dev, const struct fd_dev_id *dev_id)
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return &a6xx_backend->base;
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return &a6xx_backend->base;
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}
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}
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FD_GENX(a6xx_init);
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template
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struct backend *a6xx_init<A6XX>(struct fd_device *dev, const struct fd_dev_id *dev_id);
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template
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struct backend *a6xx_init<A7XX>(struct fd_device *dev, const struct fd_dev_id *dev_id);
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@ -266,6 +266,9 @@ main(int argc, char **argv)
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case 7:
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case 7:
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backend = a6xx_init<A7XX>(dev, dev_id);
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backend = a6xx_init<A7XX>(dev, dev_id);
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break;
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break;
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case 8:
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backend = a6xx_init<A8XX>(dev, dev_id);
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break;
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default:
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default:
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err(1, "unsupported gpu generation: a%uxx", fd_dev_gen(dev_id));
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err(1, "unsupported gpu generation: a%uxx", fd_dev_gen(dev_id));
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}
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}
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@ -28,6 +28,7 @@ computerator = executable(
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link_with : [
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link_with : [
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libfreedreno_drm,
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libfreedreno_drm,
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libfreedreno_ir3,
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libfreedreno_ir3,
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libfreedreno_layout,
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libfreedreno_perfcntrs,
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libfreedreno_perfcntrs,
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libfreedreno_common,
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libfreedreno_common,
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],
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],
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