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i965: Quit spamming gen6 DP read/write send instructions with gen5 bits.

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This was copy-and-paste from originally trying to get DP read/write
working reliably, and notably for other common messages (URB, sampler)
we weren't doing this.
This commit is contained in:
Eric Anholt 2011-04-14 20:25:33 -07:00
parent 59c6b775a6
commit 4673f9433f
1 changed files with 0 additions and 6 deletions
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6
src/mesa/drivers/dri/i965/brw_eu_emit.c
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@ -499,9 +499,6 @@ static void brw_set_dp_write_message( struct brw_context *brw,
/* We always use the render cache for write messages */
insn->header.destreg__conditionalmod = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
/* XXX really need below? */
insn->bits2.send_gen5.sfid = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
insn->bits2.send_gen5.end_of_thread = end_of_thread;
} else if (intel->gen == 5) {
insn->bits3.dp_write_gen5.binding_table_index = binding_table_index;
insn->bits3.dp_write_gen5.msg_control = msg_control;
@ -558,9 +555,6 @@ brw_set_dp_read_message(struct brw_context *brw,
insn->bits3.dp_render_cache.msg_length = msg_length;
insn->bits3.dp_render_cache.end_of_thread = 0;
insn->header.destreg__conditionalmod = target_function;
/* XXX really need below? */
insn->bits2.send_gen5.sfid = target_function;
insn->bits2.send_gen5.end_of_thread = 0;
} else if (intel->gen == 5) {
insn->bits3.dp_read_gen5.binding_table_index = binding_table_index;
insn->bits3.dp_read_gen5.msg_control = msg_control;