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iris: initialize shared screen->vtbl only once

Browse source 
Screen is shared among contexts, other context might be already using
vtbl while another initializes it again.

 ==45872== Possible data race during write of size 8 at 0x5DDAE78 by thread #549
 ==45872== Locks held: 1, at address 0x5D1B6F8
 ==45872==    at 0x6D66D91: gen9_init_state (iris_state.c:7816)
 ==45872==    by 0x6BA0A31: iris_create_context (iris_context.c:342)
 ==45872==    by 0x621F390: st_api_create_context (st_manager.c:917)
 ==45872==    by 0x620E6F9: dri_create_context (dri_context.c:163)
 ==45872==    by 0x6A40DB1: driCreateContextAttribs (dri_util.c:480)
 ==45872==    by 0x540B963: dri2_create_context (egl_dri2.c:1583)
 ==45872==    by 0x53FB84E: eglCreateContext (eglapi.c:821)
 ==45872==
 ==45872== This conflicts with a previous read of size 8 by thread #544
 ==45872== Locks held: 1, at address 0x5F6E0E0
 ==45872==    at 0x6CB779E: blorp_alloc_binding_table (iris_blorp.c:167)
 ==45872==    by 0x6CAEF70: blorp_emit_surface_states (blorp_genX_exec.h:1540)
 ==45872==    by 0x6CB67F9: blorp_exec (blorp_genX_exec.h:2016)
 ==45872==    by 0x6CB7AFE: iris_blorp_exec (iris_blorp.c:307)
 ==45872==    by 0x70F5916: try_blorp_blit (blorp_blit.c:2145)
 ==45872==    by 0x70F5FCA: do_blorp_blit (blorp_blit.c:2273)
 ==45872==    by 0x70F778F: blorp_copy (blorp_blit.c:2803)
 ==45872==    by 0x6BB9EB6: iris_copy_region (iris_blit.c:725)

v2: move as genX(init_screen_state) (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7544>
This commit is contained in:
Tapani Pälli 2020-11-11 08:59:46 +02:00 • committed by Marge Bot
parent 959c2d1edb
commit 460287adca
3 changed files with 56 additions and 31 deletions
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1
src/gallium/drivers/iris/iris_genx_protos.h
View file

@ -29,6 +29,7 @@
/* iris_state.c */
void genX(init_state)(struct iris_context *ice);
void genX(init_screen_state)(struct iris_screen *screen);
void genX(emit_hashing_mode)(struct iris_context *ice,
struct iris_batch *batch,
unsigned width, unsigned height,

20
src/gallium/drivers/iris/iris_screen.c
View file

@ -58,6 +58,24 @@
#include "intel/common/gen_uuid.h"
#include "iris_monitor.h"
#define genX_call(devinfo, func, ...) \
switch (devinfo.gen) { \
case 12: \
gen12_##func(__VA_ARGS__); \
break; \
case 11: \
gen11_##func(__VA_ARGS__); \
break; \
case 9: \
gen9_##func(__VA_ARGS__); \
break; \
case 8: \
gen8_##func(__VA_ARGS__); \
break; \
default: \
unreachable("Unknown hardware generation"); \
}
static void
iris_flush_frontbuffer(struct pipe_screen *_screen,
struct pipe_resource *resource,
@ -847,6 +865,8 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
pscreen->get_driver_query_group_info = iris_get_monitor_group_info;
pscreen->get_driver_query_info = iris_get_monitor_info;
genX_call(screen->devinfo, init_screen_state, screen);
glsl_type_singleton_init_or_ref();
return pscreen;

66
src/gallium/drivers/iris/iris_state.c
View file

@ -7761,6 +7761,41 @@ iris_set_frontend_noop(struct pipe_context *ctx, bool enable)
}
}
void
genX(init_screen_state)(struct iris_screen *screen)
{
screen->vtbl.destroy_state = iris_destroy_state;
screen->vtbl.init_render_context = iris_init_render_context;
screen->vtbl.init_compute_context = iris_init_compute_context;
screen->vtbl.upload_render_state = iris_upload_render_state;
screen->vtbl.update_surface_base_address = iris_update_surface_base_address;
screen->vtbl.upload_compute_state = iris_upload_compute_state;
screen->vtbl.emit_raw_pipe_control = iris_emit_raw_pipe_control;
screen->vtbl.emit_mi_report_perf_count = iris_emit_mi_report_perf_count;
screen->vtbl.rebind_buffer = iris_rebind_buffer;
screen->vtbl.load_register_reg32 = iris_load_register_reg32;
screen->vtbl.load_register_reg64 = iris_load_register_reg64;
screen->vtbl.load_register_imm32 = iris_load_register_imm32;
screen->vtbl.load_register_imm64 = iris_load_register_imm64;
screen->vtbl.load_register_mem32 = iris_load_register_mem32;
screen->vtbl.load_register_mem64 = iris_load_register_mem64;
screen->vtbl.store_register_mem32 = iris_store_register_mem32;
screen->vtbl.store_register_mem64 = iris_store_register_mem64;
screen->vtbl.store_data_imm32 = iris_store_data_imm32;
screen->vtbl.store_data_imm64 = iris_store_data_imm64;
screen->vtbl.copy_mem_mem = iris_copy_mem_mem;
screen->vtbl.derived_program_state_size = iris_derived_program_state_size;
screen->vtbl.store_derived_program_state = iris_store_derived_program_state;
screen->vtbl.create_so_decl_list = iris_create_so_decl_list;
screen->vtbl.populate_vs_key = iris_populate_vs_key;
screen->vtbl.populate_tcs_key = iris_populate_tcs_key;
screen->vtbl.populate_tes_key = iris_populate_tes_key;
screen->vtbl.populate_gs_key = iris_populate_gs_key;
screen->vtbl.populate_fs_key = iris_populate_fs_key;
screen->vtbl.populate_cs_key = iris_populate_cs_key;
screen->vtbl.lost_genx_state = iris_lost_genx_state;
}
void
genX(init_state)(struct iris_context *ice)
{
@ -7809,37 +7844,6 @@ genX(init_state)(struct iris_context *ice)
ctx->set_stream_output_targets = iris_set_stream_output_targets;
ctx->set_frontend_noop = iris_set_frontend_noop;
screen->vtbl.destroy_state = iris_destroy_state;
screen->vtbl.init_render_context = iris_init_render_context;
screen->vtbl.init_compute_context = iris_init_compute_context;
screen->vtbl.upload_render_state = iris_upload_render_state;
screen->vtbl.update_surface_base_address = iris_update_surface_base_address;
screen->vtbl.upload_compute_state = iris_upload_compute_state;
screen->vtbl.emit_raw_pipe_control = iris_emit_raw_pipe_control;
screen->vtbl.emit_mi_report_perf_count = iris_emit_mi_report_perf_count;
screen->vtbl.rebind_buffer = iris_rebind_buffer;
screen->vtbl.load_register_reg32 = iris_load_register_reg32;
screen->vtbl.load_register_reg64 = iris_load_register_reg64;
screen->vtbl.load_register_imm32 = iris_load_register_imm32;
screen->vtbl.load_register_imm64 = iris_load_register_imm64;
screen->vtbl.load_register_mem32 = iris_load_register_mem32;
screen->vtbl.load_register_mem64 = iris_load_register_mem64;
screen->vtbl.store_register_mem32 = iris_store_register_mem32;
screen->vtbl.store_register_mem64 = iris_store_register_mem64;
screen->vtbl.store_data_imm32 = iris_store_data_imm32;
screen->vtbl.store_data_imm64 = iris_store_data_imm64;
screen->vtbl.copy_mem_mem = iris_copy_mem_mem;
screen->vtbl.derived_program_state_size = iris_derived_program_state_size;
screen->vtbl.store_derived_program_state = iris_store_derived_program_state;
screen->vtbl.create_so_decl_list = iris_create_so_decl_list;
screen->vtbl.populate_vs_key = iris_populate_vs_key;
screen->vtbl.populate_tcs_key = iris_populate_tcs_key;
screen->vtbl.populate_tes_key = iris_populate_tes_key;
screen->vtbl.populate_gs_key = iris_populate_gs_key;
screen->vtbl.populate_fs_key = iris_populate_fs_key;
screen->vtbl.populate_cs_key = iris_populate_cs_key;
screen->vtbl.lost_genx_state = iris_lost_genx_state;
ice->state.dirty = ~0ull;
ice->state.stage_dirty = ~0ull;