diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5a767497712..8772becf699 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -5333,7 +5333,7 @@ lookup_ps_epilog(struct radv_cmd_buffer *cmd_buffer)
 
    state.color_write_mask = d->color_write_mask;
 
-   for (unsigned i = 0; i < MAX_RTS; i++) {
+   for (unsigned i = 0; i < render->color_att_count; i++) {
       const uint32_t cb_blend_control = d->cb_att[i].cb_blend_control;
       const uint32_t src_blend = G_028780_COLOR_SRCBLEND(cb_blend_control);
       const uint32_t dst_blend = G_028780_COLOR_DESTBLEND(cb_blend_control);
@@ -5383,6 +5383,14 @@ lookup_ps_epilog(struct radv_cmd_buffer *cmd_buffer)
 
    struct radv_ps_epilog_key key = radv_generate_ps_epilog_key(device, &state);
 
+   /* Adjust the remapping for alpha-to-coverage without any color attachment and dual-source
+    * blending to make sure colors written aren't cleared.
+    */
+   if (!state.color_attachment_count && state.need_src_alpha)
+      color_remap[0] = 0;
+   if (state.mrt0_is_dual_src)
+      color_remap[1] = 1;
+
    /* Determine the actual colors written if outputs are remapped. */
    uint32_t colors_written = 0;
    for (uint32_t i = 0; i < MAX_RTS; i++) {